SCDS124D July   2003  – October 2026 SN74CB3Q3245

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Description
  4. 3Pin Configuration and Functions
  5. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Typical Characteristics
  6. 5Parameter Measurement Information
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information

2 Description

The SN74CB3Q3245 device is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3245 device provides an optimized interface device designed for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3245 device is organized as an 8-bit bus switch with a single output-enable ( OE) input. When OE is low, the bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the bus switch is OFF and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when the device is powered down. The device has isolation during power off.

To verify the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
SN74CB3Q3245 DBQ (SSOP, 20) 8.65mm × 3.90mm
DGV (TVSOP, 20) 5.00mm × 4.40mm
PW (TSSOP, 20) 6.50mm × 4.40mm
RGY (VQFN, 20) 4.50mm × 3.50mm
(1) For all available packages, see Section 8.
SN74CB3Q3245 Simplified Schematic, Each FET Switch (SW) Simplified Schematic, Each FET Switch (SW)