SCES220V April   1999  – August 2026 SN74LVC1G79

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements: TA = –40°C to +85°C
    7. 5.7  Timing Requirements: TA = –40°C to +125°C
    8. 5.8  Switching Characteristics: CL = 15pF, TA = –40°C to +85°C
    9. 5.9  Switching Characteristics: CL = 30 or 50pF, TA = –40°C to +85°C
    10. 5.10 Switching Characteristics: CL = 30pF or 50pF, TA = –40°C to +125°C
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diodes
      4. 7.3.4 Partial Power Down (Ioff)
      5. 7.3.5 Over-Voltage Tolerant Inputs
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74LVC1G79 DBV Package 5-Pin SOT-23 Top ViewFigure 4-1 DBV Package 5-Pin SOT-23 Top View
SN74LVC1G79 DRL Package 5-Pin SOT Top ViewFigure 4-3 DRL Package 5-Pin SOT Top View
SN74LVC1G79 DCK Package 5-Pin SC70 Top View
See mechanical drawings for dimensions.
Figure 4-2 DCK Package 5-Pin SC70 Top View
SN74LVC1G79 YZP Package 5-Pin DSBGA Bottom ViewFigure 4-4 YZP Package 5-Pin DSBGA Bottom View
Pin Functions
PIN TYPE(1) DESCRIPTION
NAME DBV, DCK, DRL YZP
CLK 2 B1 I Positive-Edge-Triggered Clock input
D 1 A1 I Data input
GND 3 C1 — Ground
Q 4 C2 O Non-inverted output
VCC 5 A2 — Positive Supply
(1) I = Input; O=Output