SCLS768B August 2019 – March 2026 SN74HCS4075-Q1
PRODUCTION DATA
Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input capacitance given in the Section 5.5. The worst case resistance is calculated with the maximum input voltage, given in the Section 5.1, and the maximum input leakage current, given in the Section 5.5, using ohm's law (R = V ÷ I).
The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Section 5.5, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the inputs slowly will also increase dynamic current consumption of the device. For additional information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers.