SCLS768B August   2019  – March 2026 SN74HCS4075-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature range; typical ratings measured at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
VT+ Positive switching threshold 2V 1.18 1.3 V
4.5V 2.39 2.58
6V 3.11 3.32
VT- Negative switching threshold 2V 0.61 0.66 V
4.5V 1.31 1.42
6V 1.72 1.87
ΔVT VT+ - VT- 2V 0.55 0.67 V
4.5V 1.04 1.21
6V 1.34 1.49
VOH High-level output voltage VI = VIH or VIL IOH = -20µA 2V to 6V VCC - 0.1 VCC - 0.002 V
IOH = -6mA 4.5V 4.0 4.3
IOH = -7.8mA 6V 5.4 5.75
VOL Low-level output voltage VI = VIH or VIL IOL = 20µA 2V to 6V 0.002 0.1 V
IOL = 4mA 4.5V 0.18 0.30
IOL = 7.8mA 6V 0.22 0.33
II Input leakage current VI = VCC or 0 6V ±100 ±1000 nA
ICC Supply current VI = VCC or 0, IO = 0 6V 0.1 2 µA
Ci Input capacitance 2V to 6V 5 pF
Cpd Power dissipation capacitance per gate No load 2V to 6V 10 pF