SCLS768B August   2019  – March 2026 SN74HCS4075-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Revision History

Changes from October 1, 2019 to March 19, 2026 (from Revision A (October 2019) to Revision B (March 2026))

  • Changed VT+ limits at 2V VCC from 0.7V (min), 1.5V (max) to 1.18V (min), 1.3V (max) Go
  • Changed VT+ limits at 4.5V VCC from 1.7V (min), 3.15V (max) to 2.39V (min), 2.58V (max) Go
  • Changed VT+ limits at 6V VCC from 2.1V (min), 4.2V (max) to 3.11V (min), 3.32V (max) Go
  • Changed VT- limits at 2V VCC from 0.3V (min), 1.0V (max) to 0.61V (min), 0.66V (max)Go
  • Changed VT- limits at 4.5V VCC from 0.9V (min), 2.2V (max) to 1.31V (min), 1.42V (max) Go
  • Changed VT- limits at 6V VCC from 1.2V (min), 3.0V (max) to 1.72V (min), 1.87V (max)Go
  • Changed ΔVT limits at 2V VCC from 0.2V (min), 1.0V (max) to 0.55V (min), 0.67V (max)Go
  • Changed ΔVT limits at 4.5V VCC from 0.4V (min), 1.4V (max) to 1.04V (min), 1.21V (max)Go
  • Changed ΔVT limits at 6V VCC from 0.6V (min), 1.6V (max) to 1.34V (min), 1.49V (max)Go

Changes from Revision * (August 2019) to Revision A (October 2019)

  • Added D Package to data sheetGo
  • Deleted "ICC" and "output" from "Continuous current through VCC or GND" row for clarityGo