SCPA063 March   2023 PCA9306

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2General Checks for Dealing With NACKs
    1. 2.1 NACKs
    2. 2.2 Check the Schematic
    3. 2.3 Double Check SDA and SCL Between the Controller and Target
    4. 2.4 RESET Properly Biased
    5. 2.5 Device is Soldered Properly
  5. 3Scopeshots
    1. 3.1 Why use Oscilloscopes for Debugging?
    2. 3.2 Setting up the Oscilloscope
    3. 3.3 Verify the I2C Address When a NACK is Received
    4. 3.4 Validate Start and Stop Conditions
    5. 3.5 Check the Byte Format
    6. 3.6 Are Rise Times Within I2C Standard?
    7. 3.7 Are the Sent Command Bytes Valid?
  6. 4I2C Switches
    1. 4.1 Stop Conditions for TI I2C Switches
  7. 5I2C Buffers
    1. 5.1 VoL versus ViLc of the Buffer
    2. 5.2 VoL of the Buffer Exceeds the ViL of the I2C Target
    3. 5.3 Static Offset of Buffers Cannot Connect to Other Static Offsets
  8. 6Checklists
  9. 7Conclusion

Are the Sent Command Bytes Valid?

If a command byte is not defined for a particular target device, a NACK is sent to the controller. To make sure that the correct command byte for a device is sent, use an oscilloscope to check if all of the 8 bits sent to the target match the bits of the command defined in the data sheet of the device. Remember that the command byte needs to be sent after the address byte and before the data byte in a frame.

Figure 3-9 shows an example where the I2C target address and write bit is sent followed by a bad (outside of the available registers of the I2C target) command byte resulting in a NACK. The target device in this example only has four registers (0x00h to 0x03h). If a command byte with the register value of 0x04h is sent, the result expected is a NACK, since 0x04h is outside of the acceptable bytes of 0x00h to 0x03h.

GUID-20221012-SS0I-L8GP-SV1C-ZTRGCXG19P0S-low.png Figure 3-8 Example of Invalid Register Receiving a NACK

Figure 3-9 shows an example using the same I2C target address and write bit from Figure 3-8 but a known good command byte (a command byte recognized by the I2C target) is sent resulting in an ACK. The target device in this example accepts the 0x03h register byte because the target device has a register between values of 0x00h and 0x03h, all of which are registers that can be written to.

GUID-20221012-SS0I-9F9J-H1XN-SWJGRDK9GVVS-low.png Figure 3-9 Example of Acceptable Command Byte Receiving an ACK