SCPS309B August   2025  – June 2026 TXE8116

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 SPI Bus Timing Requirements
    8. 5.8 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 Interrupt Output (INT)
      3. 7.3.3 Reset Input (RESET)
      4. 7.3.4 Bus Hold
      5. 7.3.5 Fail-safe Mode
      6. 7.3.6 Software Reset Call
      7. 7.3.7 Daisy Chain
      8. 7.3.8 Multi Port
      9. 7.3.9 Feature Register Mapping
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 SPI
      2. 7.5.2 SPI Data Format
      3. 7.5.3 Burst Mode
      4. 7.5.4 SPI Write
      5. 7.5.5 SPI Read
      6. 7.5.6 SPI Daisy Chain
    6. 7.6 TXE8116 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.7 Daisy Chain

Multiple TXE8116 devices can be connected in a daisy chain configuration as shown in example implementation Figure 7-3, to expand the number of I/O ports supported. In the daisy chain mode of operation, the SDO of the controller is connected to the SDI of the first TXE8116. The SDO of the first TXE8116 is in turn connected to the SDI of the next TXE8116. This connection can be done until the last TXE8116, where the SDO is connected to the SDI of the controller. When connecting devices in a daisy chain, sampling of the SDO from the last devices may require the SCLK frequency to be reduced, because the data valid time from each of the devices in the chain add up, along with the propagation delay of the SCLK to the furthest device.

TXE8116 SPI Daisy Chain Diagram Figure 7-3 SPI Daisy Chain Diagram

The controller transmits a header to auto-configure the daisy chain of operation, followed by the register address of the devices in the chain with the register address of the farthest device in the chain (the device furthest from the controller SDI and closest to the controller SDO) first. The data is transmitted after the address with data for the furthest device first. When receiving, the data from the furthest device is received first.

Refer to Figure 7-4 for the frames of daisy chained transaction. The same sequencing is repeated throughout the entire chain until the final device is reached.

TXE8116 SPI Daisy Chain Data Frame Figure 7-4 SPI Daisy Chain Data Frame

Header segment

Bit-15 and 14 in Header segment are the Header ID that is used by the device controller to detect that a header segment is being received. The Header ID bits have the value 01 to indicate this is a Header segment.

Bit-13 to 5 are reserved and bits 4 to 0 indicate the number of devices in the chain. The maximum number of devices that can be daisy chained is 31.

Address segment (Register Address)

Bit 15 indicates SPI mode of operation (1 = Read operation 0 = Write operation). Refer to the first and second byte in Figure 7-5 for the register address.

Status segment

Bit-15 and 14 indicate a status segment and set to 11 to indicate status segment. Bit 13 to 8 indicate the fault status register and bit 7 to 0 are always transmitted as 0.