SDAA040 July 2025 MSPM0C1104
The capture and compare (CC) block is used for capture events or compare events. Using the MSPM0C series MCU, TIMG has up to two identical capture and compare blocks and TIMA has up to four identical capture and compare blocks present to support external or internal signals. Timer capture mode is used to generate capture events and record time intervals, which is useful for speed computation or time measurements. See the MSPM0 C-Series 24-MHz Microcontrollers Technical Reference Manual for more information about CC lock settings and key registers for configuring capture mode.
Using two capture registers can combine pulse-width and period capture of a single input waveform. The input signal can be externally connected to channel 0 of the CCP, and the IFCTL_01[1] register can be configured to have the input connected to channel 1 of the CCP internally so capture register 0 (TIMx.CC0) captures the pulse width and capture register 1 (TIMx.CC1) captures the period. The expected internal timing for combined pulse-width and period capture is shown in Figure 2-1.
The duty and period calculation formulas are:
The formula functions when TIMx.CTR is set to count down mode.
Figure 2-2 shows the capture time order of this method, since the TIMx.CTR must be reloaded manually after the first input edge signal captured at T1. The time delay from T1 to T2 causes this error.
Figure 2-2 Timer Order of Capture PWM
Duty and Period with Timx CC Block