SDAA100 April   2026 ADC12DJ5200RF , ADC32RF54 , ADC32RF55 , LMX2572 , LMX2594 , LMX2820

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Effects of a Phase Noise Curve of a Clock on the Performance of the Converter
  6. Determine Clock Performance Target Values for a Selected Data Converter
  7. Narrow Down Which TI Clock to Select Based on the Specified Requirements Determined
  8. Analyze the Proposed Clock's Jitter on a Converter's Performance
  9. Understanding Clocking Performance Effects on the SNR of the Converter
    1. 6.1 Limitations from TI Clocking Parts When Paired with TI High-Speed Converters
  10. Summary
  11. References
  12. Appendix A: Clock Tree Architect (CTA) Detailed Step-By-Step Guide
  13. 10Appendix B: Using PLLatinum Sim to Represent Clock Jitter for an Application's Integrated Bandwidth
  14. 11Appendix C: PLLatinum Sim Phase Noise Curves Comparison Step-by-Step Guide
  15. 12Appendix D: Comparing Phase Noise Curve Simulations of PLLatinum Sim with Measured Data

Appendix A: Clock Tree Architect (CTA) Detailed Step-By-Step Guide

To show how to use CTA, consider the following example:

  • The user is are an aerospace and defense customer.
  • The user prefers clocks with extended temperature or high-reliability (-EP) ratings.
  • The user is using using a very clean 10fs 100MHz reference.
  • The user wants to clock the ADC12DJ5200RF with a CML 5200MHz IC clock (not standalone passive components).
  • The clock must generate a SYSREF signal for multi-converter synchronization.

Once you have defined your application's requirements:

  1. Open Clock Tree Architect in the browser and on the first drop-down under Application, select your application. For this example, select Aerospace & defense (non space). CTA auto-fills default values in the System configuration section and the Available input(s) from your system sections based on the selection.
  2. Set your application requirements under System requirements. For this example, the aim is to maximize the converter's SNR, so set the Jitter metric to Very Important and all other parameters to Less important, as shown on Figure 9-1.
     System Requirements
              Section Figure 9-1 System Requirements Section
    1. Refine system requirements by clicking on the +Add specifications button. For this example, we selected Extended Temperature & High Reliability (-EP) and Extended Temperature and set both to Prioritize, as shown on Figure 9-1. Select Require, Deprioritize, and Exclude. Require and Exclude do not consider certain parts from the clocking database while Prioritize and Deprioritize consider all parts in the database and give certain parts more weight. Other system specifications include programming methods, standard compliance, and overall system power, area, jitter, and price budgets, as shown in Figure 9-2.
       Complete List of System
                  Requirements  Complete List of System
                  Requirements Figure 9-2 Complete List of System Requirements
  3. Enter your output specifications under Outputs. Set Frequency to 5200MHz, keep Clock count as 1, and set Format to CML, as illustrated in Figure 9-3.
     Outputs Section Figure 9-3 Outputs Section
    1. Add requirements to your outputs by selecting +Add requirements. For this example, we need to set jitter and noise floor, and select SYSREF.
      1. Select Jitter, Noise Floor, and SYSREF options, as shown on Figure 9-4
      2. Click on the Update selection button.
      3. In the jitter and noise floor boxes, set the jitter and noise floor to the values of the ADC12DJ5200RF, which are 50fs and -151.8dBc/Hz, as demonstrated on Figure 9-3. These target values were chosen to relax the clock performance requirements and ensure CTA gives a design since these example wants to use an IC. Once the designs are given, they can be analyzed using Section 5
    2. Set other output requirements such as adjustable output delays, selectable outputs formats, or deterministic phase as shown in Figure 9-4.
     Complete List of Output
              Requirements  Complete List of Output
              Requirements Figure 9-4 Complete List of Output Requirements
  4. If the user wants CTA to consider a reference/clock that already exists in the system, click on + Add available input from your system under the Available input(s) from your system section. For this example, the default of the Aerospace & defense (non space) already sets the input to 100MHz with 10fs of jitter, which matches this example. This is shown in Figure 9-5.
     Available Input From Your System
              Section Figure 9-5 Available Input From Your System Section
    1. To force CTA to use this input, toggle Any input(s) required in the design?.
    2. To define input characteristics, click on +Add input characteristics, update any fields as needed based on the application, and click on Update selection, as shown on Figure 9-6.
       Complete List of Input
                  Characteristics from an Already Selected Reference Figure 9-6 Complete List of Input Characteristics from an Already Selected Reference
  5. After filling in all sections that pertain to your application, click the Create designs button on the bottom right. Figure 9-7 demonstrates the finalized system setup for CTA to propose viable clocking suggestions.
     Finalized CTA Setup Figure 9-7 Finalized CTA Setup
  6. After a few minutes (sometimes several minutes), CTA generates a list of clocking schemes that meet your system requirements. The results are organized from TI's best recommendation to worst. Figure 9-8 shows the results for this example, clearly recommending the LMX2820.
    1. For more details on the proposed design, click on the Export PDF button on the bottom right corner.
       Results Page Showcasing Top
                  Clocking Recommendations Matching Your Application's Requirements Figure 9-8 Results Page Showcasing Top Clocking Recommendations Matching Your Application's Requirements
    2. Sometimes, there is no clocking designs that meet all requirements. In that case, CTA recommends the closest possible match.