SDAA210 November   2025 LM5125-Q1 , LM51251A-Q1 , LM5125A-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Application Implementation
  6. 3Design Considerations
  7. 4Test Results
    1. 4.1 Efficiency Measurements
    2. 4.2 Device Features
      1. 4.2.1 Soft-Start (SS)
      2. 4.2.2 Over-Voltage Protection (OVP)
      3. 4.2.3 Second phase enable (EN2)
      4. 4.2.4 Bypass mode
    3. 4.3 Load Transient
    4. 4.4 Line Transient
    5. 4.5 Temperature Measurements
    6. 4.6 Bode Plot
  8. 5Summary
  9. 6References

Design Considerations

Typically, in a DC/DC synchronous converter the SWx pin (device pin) and the SW node (inductor terminal) are connected. Also, a 100nF capacitor is connected between HBx pin and SWx pin for bootstrap functionality, i.e. providing a supply for the high-side gate driver which is 5V higher with respect to the SWx pin. In asynchronous mode the 100nF bootstrap capacitor is useless, since there is no high-side FET; therefore, it must be removed. However, in the absence of a bootstrap capacitor, the HBx pin does not have the capability to build 5V with respect to the SWx pin, hence a fault will be triggered inside the device; this fault in turn causes the unnecessary gate driver switching activity.

To avoid this, the HBx pin must be pulled to VCC and SWx pin must be grounded on the evaluation board (Figure 3-1). This verifies that the HBx pin with respect to the SWx pin is always 5V, hence bypassing the fault detector. Since SWx pin being grounded does not allow required voltage switching activity across inductor, the connection between the SWx pin and the switch node must be removed. See Figure 3-1 for the changes on the EVM.

 Block Diagram of the LM5125 in
                    Asynchronous Mode Figure 3-1 Block Diagram of the LM5125 in Asynchronous Mode