1 Introduction to Functional Safety Voltage Monitoring requirements for MSPM0

The VCORE signal is an output voltage tied to the core regulator/internal LDO within the MSPM0's PMU. It can be monitored to verify that the MSPM0 core voltage remains within the correct operating limits, ensuring proper device functionality. Furthermore, any VCORE monitoring block is considered external to the MCU; therefore, the FIT rate of the external circuit will need to be sourced from the respective FMEDA document, if one is available.

The PMU module has an internal set of thresholds that ensure the device's power is within expected operating conditions, as stated in each MSPM0's datasheet. This set of thresholds configures a different voltage-level monitor to ensure the device meets power requirements for proper operation. The different thresholds can be used to configure the device to perform specific actions when triggered. For more information, please refer to the PMU section of the Technical Reference Manual for the MSPM0 the application uses (e.g., PMU section in the MSPM0G family).

The list below shows the current MSPM0 devices that have a VCORE pin and are/will be FuSa Compliant certified:

1. MSPM0LX22X
2. MPSM0GX51X & MSPM0G32XX
3. MSPM0G150X & MSPM0G3X0X
4. MSPM0L2116/7 & MSPM0L1126/7

The PMU does not monitor VDD overvoltage in the MSPM0. VDD monitoring is a requirement assumed to be covered at the system level; i.e., this Safety Mechanism is expected to be implemented externally. For more information on the specific test cases and considerations required for the MSPM0 to achieve Functional Safety compliance, please refer to the Functional Safety Manual for your respective MSPM0 device (see the table below). Nevertheless, this application note provides a recommended dedicated approach for monitoring VDD.