SDAA352 May   2026 TDA4VH-Q1 , TDA4VL-Q1 , TDA4VM , TDA4VM-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Architecture
    1. 2.1 Core Configuration
    2. 2.2 Power Domain Architecture
    3. 2.3 IPC Framework Overview
  6. 3Heartbeat Monitoring Design
    1. 3.1 Ping-Pong Protocol
    2. 3.2 Dual-Task Architecture
    3. 3.3 Crash Detection Logic
  7. 4 Recovery Mechanism
    1. 4.1 Power State Transitions
  8. 5 Implementation Details
    1. 5.1 Configuration Parameters
    2. 5.2 Parameter Tuning Guidance:
    3. 5.3 Linux-Side rpmsg_char Implementation
  9. 6 Test Results and Performance
    1. 6.1 Timing Profile
    2. 6.2 Recovery Verification
  10. 7Summary
  11. 8References

6.2 Recovery Verification

The heartbeat monitoring system was tested with multiple crash scenarios:

Test Case 1: RTOS Core Crash (c7x_1)

- Simulated by halting the C7x DSP

- Detection time: 3 retry cycles

- Recovery: Successful, all cores restored to ALIVE state

Test Case 2: R5F Core Crash (mcu2_0)

- Simulated halting MCU2_0 core

- Detection time: 3 retry cycles

- Recovery: Successful, all cores restored to ALIVE state

Test Case 3: Linux Core Crash (mpu1_0)

- Simulated by killing the rpmsg_char_simple application or by halting the mpu1_0 core

- Detection time: 3 retry cycles

- Recovery: Successful, Linux rebooted and reconnected, all cores restored to ALIVE state