Product details

CPU 2 Arm Cortex-A72 Frequency (MHz) 1200 Coprocessors 4 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, 1 EDP, MIPI DPI Protocols Ethernet PCIe 1 PCIe Gen 3 Hardware accelerators C7™ NPU, Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator, Vision processing accelerator Features Multimedia, Vision Analytics Operating system AutoSAR, FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, VxWorks, u-velOSity Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Power supply solution LP8764-Q1, TPS6594-Q1 Operating temperature range (°C) -40 to 125 Edge AI enabled Edge AI Studio enabled, Yes
CPU 2 Arm Cortex-A72 Frequency (MHz) 1200 Coprocessors 4 Arm Cortex-R5F Graphics acceleration 1 3D Display type 1 DSI, 1 EDP, MIPI DPI Protocols Ethernet PCIe 1 PCIe Gen 3 Hardware accelerators C7™ NPU, Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator, Vision processing accelerator Features Multimedia, Vision Analytics Operating system AutoSAR, FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, VxWorks, u-velOSity Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Power supply solution LP8764-Q1, TPS6594-Q1 Operating temperature range (°C) -40 to 125 Edge AI enabled Edge AI Studio enabled, Yes
FCBGA (ALZ) 770 529 mm² (23 mm × 23 mm)

Processor cores:

  • Two C7x floating point, vector DSP, up to 1.0GHz, 160GFLOPS, 512GOPS
  • Deep-learning matrix multiply accelerator (MMA), up to 8TOPS (8b) at 1.0GHz
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators
  • Depth and Motion Processing Accelerators (DMPAC)
  • Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2GHz
    • 1MB shared L2 cache per dual-core Cortex-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex-A72 core
  • Up to Six Arm Cortex-R5F MCUs at up to 1.0GHz
    • 32K I-Cache, 32K D-Cache, 64K L2 TCM
    • Two Arm Cortex-R5F MCUs in isolated MCU subsystem
    • Four (TDA4VE) or Two (TDA4AL/TDA4VL) Arm Cortex-R5F MCUs in general compute partition
  • GPU IMG BXS-4-64, 256kB Cache, up to 800MHz, 50GFLOPS, 4GTexels/s (TDA4VE and TDA4VL)
  • Custom-designed interconnect fabric supporting near max processing entitlement

Memory subsystem:

  • Up to 4MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • Up to Two External Memory Interface (EMIF) modules with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 4266MT/s
    • Two (TDA4VE) or One (TDA4AL/TDA4VL) 32-bit data bus with inline ECC up to 17GB/s per EMIF
  • General-Purpose Memory Controller (GPMC)
  • One (TDA4AL/TDA4VL) or Two (TDA4VE) 512KB on-chip SRAM in MAIN domain, protected by ECC

Functional Safety:

  • Functional Safety-Compliant (on select part numbers)
  • Developed for functional safety applications
  • Documentation available to aid ISO 26262/IEC 61508 functional safety system design up to ASIL D/SIL 3
  • Systematic capability up to ASIL D/SC 3
  • Hardware integrity up to ASIL D/SIL 3 for MCU Domain
  • Hardware integrity up to ASIL B/SIL 2 for Main Domain
  • Hardware integrity up to ASIL D/SIL 3 for Extended MCU (EMCU) portion of the Main Domain
  • Safety-related certification

Device security (on select part numbers):

  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES

High speed serial interfaces:

  • One PCI-Express (PCIe) Gen3 controllers
    • Up to four lanes per controller
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
  • One USB 3.0 dual-role device (DRD) subsystem
    • Enhanced SuperSpeed Gen1 Port
    • Supports Type-C switching
    • Independently configurable as USB host, USB peripheral, or USB DRD
  • Two CSI2.0 4L Camera Serial interface RX (CSI-RX) plus two CSI2.0 4L TX (CSI-TX) with DPHY
    • MIPI CSI 1.3 Compliant + MIPI-DPHY 1.2
    • CSI-RX supports for 1,2,3, or 4 data lane mode up to 2.5Gbps per lane
    • CSI-TX supports for 1,2, or 4 data lane mode up to 2.5Gbps per lane

Automotive interfaces:

  • Twenty Modular Controller Area Network (MCAN) modules with full CAN-FD support

Display subsystem:

  • One (TDA4AL/TDA4VL) or Two (TDA4VE) DSI 4L TX (up to 2.5K)
  • One eDP 4L (TDA4VE/TDA4VL)
  • One DPI

Audio interfaces:

  • Five Multichannel Audio Serial Port (MCASP) modules

Video acceleration:

  • TDA4VE: H.264/H.265 Encode/Decode (up to 480MP/s)
  • TDA4AL: H.264/H.265 Encode only (up to 480MP/s)
  • TDA4VL: H.264/H.265 Encode/Decode (up to 240MP/s)

Ethernet:

  • Two RMII/RGMII interfaces

Flash memory interfaces:

  • Embedded MultiMediaCard Interface ( eMMC™ 5.1)
  • One Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI or HyperBus™ or QSPI, and
    • One QSPI

System-on-Chip (SoC) architecture:

  • 16-nm FinFET technology
  • 23mm x 23mm, 0.8-mm pitch, 770-pin FCBGA (ALZ)

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

Processor cores:

  • Two C7x floating point, vector DSP, up to 1.0GHz, 160GFLOPS, 512GOPS
  • Deep-learning matrix multiply accelerator (MMA), up to 8TOPS (8b) at 1.0GHz
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators
  • Depth and Motion Processing Accelerators (DMPAC)
  • Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2GHz
    • 1MB shared L2 cache per dual-core Cortex-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex-A72 core
  • Up to Six Arm Cortex-R5F MCUs at up to 1.0GHz
    • 32K I-Cache, 32K D-Cache, 64K L2 TCM
    • Two Arm Cortex-R5F MCUs in isolated MCU subsystem
    • Four (TDA4VE) or Two (TDA4AL/TDA4VL) Arm Cortex-R5F MCUs in general compute partition
  • GPU IMG BXS-4-64, 256kB Cache, up to 800MHz, 50GFLOPS, 4GTexels/s (TDA4VE and TDA4VL)
  • Custom-designed interconnect fabric supporting near max processing entitlement

Memory subsystem:

  • Up to 4MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • Up to Two External Memory Interface (EMIF) modules with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 4266MT/s
    • Two (TDA4VE) or One (TDA4AL/TDA4VL) 32-bit data bus with inline ECC up to 17GB/s per EMIF
  • General-Purpose Memory Controller (GPMC)
  • One (TDA4AL/TDA4VL) or Two (TDA4VE) 512KB on-chip SRAM in MAIN domain, protected by ECC

Functional Safety:

  • Functional Safety-Compliant (on select part numbers)
  • Developed for functional safety applications
  • Documentation available to aid ISO 26262/IEC 61508 functional safety system design up to ASIL D/SIL 3
  • Systematic capability up to ASIL D/SC 3
  • Hardware integrity up to ASIL D/SIL 3 for MCU Domain
  • Hardware integrity up to ASIL B/SIL 2 for Main Domain
  • Hardware integrity up to ASIL D/SIL 3 for Extended MCU (EMCU) portion of the Main Domain
  • Safety-related certification

Device security (on select part numbers):

  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES

High speed serial interfaces:

  • One PCI-Express (PCIe) Gen3 controllers
    • Up to four lanes per controller
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
  • One USB 3.0 dual-role device (DRD) subsystem
    • Enhanced SuperSpeed Gen1 Port
    • Supports Type-C switching
    • Independently configurable as USB host, USB peripheral, or USB DRD
  • Two CSI2.0 4L Camera Serial interface RX (CSI-RX) plus two CSI2.0 4L TX (CSI-TX) with DPHY
    • MIPI CSI 1.3 Compliant + MIPI-DPHY 1.2
    • CSI-RX supports for 1,2,3, or 4 data lane mode up to 2.5Gbps per lane
    • CSI-TX supports for 1,2, or 4 data lane mode up to 2.5Gbps per lane

Automotive interfaces:

  • Twenty Modular Controller Area Network (MCAN) modules with full CAN-FD support

Display subsystem:

  • One (TDA4AL/TDA4VL) or Two (TDA4VE) DSI 4L TX (up to 2.5K)
  • One eDP 4L (TDA4VE/TDA4VL)
  • One DPI

Audio interfaces:

  • Five Multichannel Audio Serial Port (MCASP) modules

Video acceleration:

  • TDA4VE: H.264/H.265 Encode/Decode (up to 480MP/s)
  • TDA4AL: H.264/H.265 Encode only (up to 480MP/s)
  • TDA4VL: H.264/H.265 Encode/Decode (up to 240MP/s)

Ethernet:

  • Two RMII/RGMII interfaces

Flash memory interfaces:

  • Embedded MultiMediaCard Interface ( eMMC™ 5.1)
  • One Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI or HyperBus™ or QSPI, and
    • One QSPI

System-on-Chip (SoC) architecture:

  • 16-nm FinFET technology
  • 23mm x 23mm, 0.8-mm pitch, 770-pin FCBGA (ALZ)

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

The TDA4VE TDA4AL TDA4VL processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at Smart Vision Camera applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the Vision processor market. The TDA4AL provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced vision camera applications. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.

Key Performance Cores Overview: The “C7x” next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating-point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new “MMA” deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated Vision hardware accelerators provide vision pre-processing with no impact on system performance.

General Compute Cores and Integration Overview: Separate dual core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to four Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A72 core’s unencumbered for applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D levels while the integrated security features protect data against modern day attacks. CSI2.0 ports enable multi sensor inputs. To further the integration, the TDA4VE TDA4AL TDA4VL family also includes an MCU island eliminating the need for an external system microcontroller.

The TDA4VE TDA4AL TDA4VL processor family is based on the evolutionary Jacinto™ 7 architecture, targeted at Smart Vision Camera applications and built on extensive market knowledge accumulated over a decade of TI’s leadership in the Vision processor market. The TDA4AL provides high performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced vision camera applications. Key cores include next generation DSP with scalar and vector cores, dedicated deep learning and traditional algorithm accelerators, latest Arm and GPU processors for general compute, an integrated next generation imaging subsystem (ISP), video codec, and isolated MCU island. All protected by automotive grade safety and security hardware accelerators.

Key Performance Cores Overview: The “C7x” next generation DSP combines TI’s industry leading DSP and EVE cores into a single higher performance core and adds floating-point vector calculation capabilities, enabling backward compatibility for legacy code while simplifying software programming. The new “MMA” deep learning accelerator enables performance up to 8 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C. The dedicated Vision hardware accelerators provide vision pre-processing with no impact on system performance.

General Compute Cores and Integration Overview: Separate dual core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor. Up to four Arm® Cortex®-R5F subsystems enable low-level, timing critical processing tasks to leave the Arm® Cortex®-A72 core’s unencumbered for applications. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite, support for higher bit depth, and features targeting analytics applications. Integrated diagnostics and safety features support operations up to ASIL-D levels while the integrated security features protect data against modern day attacks. CSI2.0 ports enable multi sensor inputs. To further the integration, the TDA4VE TDA4AL TDA4VL family also includes an MCU island eliminating the need for an external system microcontroller.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet TDA4VE TDA4AL TDA4VL Jacinto™ Processors, Silicon Revision 1.0 datasheet (Rev. C) PDF | HTML Nov 6, 2025
* User guide J721S2, TDA4AL, TDA4VL, TDA4VE, AM68A Technical Reference Manual (Rev. F) PDF | HTML Sep 2, 2025
* Errata J721S2, TDA4VE, TDA4AL, TDA4VL, AM68A Processor Silicon Errata (Rev. D) PDF | HTML Jun 3, 2026
Application note Recovery of Main Domain on Heterogeneous SOC PDF | HTML May 29, 2026
Product overview TIDLRunner: Simplifying the 'Bring Your Own Model' Development Flow for Edge AI Accelerated Processors PDF | HTML May 14, 2026
Application note Tuning QoS and CoS Settings for DDR Bandwidth Optimization on TDA4x and AM6x Devices (Rev. A) PDF | HTML Mar 23, 2026
Functional safety information Confirmation of Software Component Qualification for JACINTO IPC for J721E, J721S2, J7200, J784S4, and J742S2 PDF | HTML Mar 19, 2026
Application note Boot Flow Options on TDA4 Devices PDF | HTML Jan 5, 2026
Functional safety information J721E, J721S2, J7200, J784S4, and J742S2 TÜV SÜD Letter of Confirmation for Software Component Qualification Oct 1, 2025
Functional safety information J7200, J721E, J721S2, J722S, J742S2, and J784S4 SDL TÜV SÜD Functional Safety Certificate (Rev. A) Sep 25, 2025
Functional safety information J721E, J721S2, J7200, J722S, J742S2, J784S4 MCAL TÜV SÜD Functional Safety Certificate (Rev. A) Sep 25, 2025
Application note CPU Cooling Using Dynamic Frequency Scaling in Linux PDF | HTML Jul 9, 2025
Functional safety information TÜV SÜD Certificate for Functional Safety Software Development Process (Rev. D) Jun 17, 2025
Functional safety information J721S2 TDA4VE TDA4AL TDA4VL TUV SUD Functional Safety Certificate Jun 6, 2025
User guide Powering Jacinto 7 SoC For Isolated Power Groups With TPS6594133A-Q1 + Dual HCPS (Rev. A) PDF | HTML May 16, 2025
Application note MCAN Debug Guide PDF | HTML Feb 18, 2025
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML Jan 28, 2025
Application brief Custom DDR Memory Mapping for Vision Applications on Jacinto SoCs PDF | HTML Dec 16, 2024
Application note Jacinto 7 LPDDR4 Board Design and Layout Guidelines (Rev. F) PDF | HTML Aug 5, 2024
Application note Debugging GPU Driver Issues on TDA4x and AM6x Devices PDF | HTML Jun 20, 2024
Application note Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design Guidelines (Rev. A) PDF | HTML Jun 4, 2024
Application note Jacinto7 AM6x/TDA4x/DRA8x Schematic Checklist (Rev. B) PDF | HTML Apr 4, 2024
Application note Jacinto7 HS Device Customer Return Process PDF | HTML Nov 16, 2023
User guide J721S2, TDA4VE, TDA4AL, TDA4VL, AM68 Power Estimation Tool (Rev. A) PDF | HTML May 16, 2023
White paper Advanced AI Vision Processing Using AM68A for Industrial Smart Camera Apps PDF | HTML May 10, 2023
White paper Designing an Efficient Edge AI System with Highly Integrated Processors (Rev. A) PDF | HTML Mar 13, 2023
Application note UART Log Debug System on Jacinto 7 SoC PDF | HTML Jan 9, 2023
Product overview Jacinto™ 7 Safety Product Overview PDF | HTML Aug 15, 2022
Application note Dual-TDA4x System Solution PDF | HTML Apr 29, 2022
Application note SPI Enablement & Validation on TDA4 Family PDF | HTML Apr 5, 2022
Technical article How are sensors and processors creating more intelligent and autonomous robots? PDF | HTML Mar 29, 2022
Technical article How to simplify your embedded edge AI application development PDF | HTML Jan 28, 2022
Application note Enabling MAC2MAC Feature on Jacinto7 Soc Jan 10, 2022
Functional safety information Leverage Jacinto 7 Processors Functional Safety Features for Automotive Designs (Rev. A) PDF | HTML Oct 13, 2021
Application note TDA4 Flashing Techniques PDF | HTML Jul 8, 2021
White paper Security Enablers on Jacinto™ 7 Processors Jan 4, 2021
White paper Enabling Differentiation through MCU Integration on Jacinto™ 7 Processors Oct 22, 2020
Application note OSPI Tuning Procedure PDF | HTML Jul 8, 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

J721EXCPXEVM — Common processor board for Jacinto™ 7 processors

The J721EXCP01EVM common processor board for Jacinto™ 7 processors lets you evaluate vision analytics and networking applications in automotive and industrial markets. The common processor board is compatible with all Jacinto 7 processors system-on-modules (sold separately or as a (...)

User guide: PDF | HTML
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Evaluation board

J721S2XSOMXEVM — TDA4VE-Q1, TDA4VL-Q1 and TDA4AL-Q1 system on module (SoM)

The J721S2XSOMXEVM system on module (SoM) — when paired with the J721EXCPXEVM common processor board — is a development platform to evaluate the Jacinto™ 7 TDA4VE-Q1, TDA4VL-Q1 and TDA4AL-Q1 automotive processors for vision analytics and networking applications throughout the (...)

User guide: PDF | HTML
Supported products & hardware
Evaluation board

J7EXPA01EVM — Fusion2 Serial Capture expansion board kit

Expand the capabilities of the Jacinto7 EVMs to development and evaluate systems that enable developers to develop hardware and write software around the Jacinto7 family of processors. Additional functionally can be added to the EVM/SK using the Fusion2 expansion board

The Fusion2 Serial Capture (...)

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Evaluation board

J7EXPCXEVM — Gateway/Ethernet switch expansion card

Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our Gateway/Ethernet switch expansion card.

User guide: PDF | HTML
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Evaluation board

J7EXPEXEVM — Audio and display expansion card

Expand the capabilities of the J721EXCP01EVM common processor board for evaluating Jacinto 7 processors in vision analytics and networking applications in automotive and industrial markets with our audio and display expansion card.
User guide: PDF | HTML
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Development kit

PHYTC-3P-PHYCORE-AM68 — PHYTEC phyCORE-AM68 system on module for AM68x and TDA4VE/AL/VL processors

The phyCORE®-AM68A is characterized by system integration, scalability, and cost savings. The processor combines deep learning accelerators, vector processing,  general-purpose microprocessors as well as an integrated imaging subsystem, making phyCORE-AM68x/TDA4x an excellent solution for (...)

From: PHYTEC
Supported products & hardware
Debug probe

TMDSEMU110-U — XDS110 JTAG Debug Probe

The Texas Instruments XDS110 is a new class of debug probe (emulator) for TI embedded processors. The XDS110 replaces the XDS100 family while supporting a wider variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a single pod. Also, all XDS debug probes support Core and System Trace in all (...)

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Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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In stock
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Debug probe

LB-3P-TRACE32-ARM — Lauterbach TRACE32® Debug and Trace System for Arm®-based Microcontrollers and Processors

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Supported products & hardware
Debug probe

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-LINUX-J721S2 — Linux® SDK for TDA4VE, TDA4VL and TDA4AL

The J721S2 processor software development kit (SDK) real-time operating system (RTOS) can be used together with either processor SDK Linux® or processor SDK QNX® to form a multiprocessor software development platform for TDA4VL-Q1 and TDA4AL-Q1 system-on-a-chip (SoCs) within our Jacinto™ platform.

(...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-QNX-J721S2 — QNX SDK for TDA4VE, TDA4VL and TDA4AL

The J721S2 processor software development kit (SDK) real-time operating system (RTOS) can be used together with either processor SDK Linux® or processor SDK QNX® to form a multiprocessor software development platform for TDA4VL-Q1 and TDA4AL-Q1 system-on-a-chip (SoCs) within our Jacinto™ platform.

(...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-RTOS-J721S2 — RTOS SDK for TDA4VE, TDA4VL and TDA4AL

The J721S2 processor software development kit (SDK) real-time operating system (RTOS) can be used together with either processor SDK Linux® or processor SDK QNX® to form a multiprocessor software development platform for TDA4VL-Q1 and TDA4AL-Q1 system-on-a-chip (SoCs) within our Jacinto™ platform.

(...)

Supported products & hardware
IDE, configuration, compiler or debugger

C7000-CGT — C7000 code generation tools - compiler

The TI C7000 C/C++ compiler tools are an essential component of the CCStudio™ development ecosystem, providing robust support for TI C7000™ digital signal processor cores. They are engineered to maximize the potential of high-performance C7000-based platforms.

The CCStudio™ IDE is the integrated (...)

Supported products & hardware
IDE, configuration, compiler or debugger

CCSTUDIO — CCStudio™ IDE

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

Supported products & hardware
IDE, configuration, compiler or debugger

SAFETI_CQKIT — Safety compiler qualification kit

The Safety Compiler Qualification Kit was developed to assist customers in qualifying their use of the TI ARM, C6000, C7000 or C2000/CLA C/C++ Compiler to functional safety standards such as IEC 61508 and ISO 26262.

The Safety Compiler Qualification Kit:

  • is free of charge for TI customers
  • does (...)
Supported products & hardware
IDE, configuration, compiler or debugger

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

Supported products & hardware
IDE, configuration, compiler or debugger

TSK-3P-VX-TOOLSET — TASKING VX-toolset for Arm

The VX-toolset for Arm is a certified compiler toolchain for safety-critical embedded software development on select Cortex-M and Cortex-R core devices. With Eclipse IDE integration, advanced multicore support and TASKING BlueBox debugger compatibility, the VX-toolset simplifies development. TÜV (...)

Supported products & hardware
Operating system (OS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The INTEGRITY RTOS from Green Hills Software is the safe and secure foundation for running critical applications and guest operating systems on TI processors using Arm® Cortex-A cores. Its certified separation kernel runs software within protected partitions with certified (...)

Supported products & hardware
Operating system (OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)

Supported products & hardware
Operating system (OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS Pre-certified safety RTOS

SAFERTOS® is a unique real time operating system designed for embedded processors. It is precertified to IEC 61508 SIL3 and ISO 26262 ASILD standards by TÜV SÜD. SAFERTOS® was crafted specifically for safety by WHIS' team of experts and is used globally in safety critical applications. WHIS and (...)

Supported products & hardware
Firmware

USIT-3P-SECIC-HSM — Uni-Sentry SecIC-HSM Firmware

The SecIC-HSM is designed to meet the cybersecurity requirements needed for MCU/SoC chips. The HSM firmware can be applied in fields such as automobiles, new energy, photovoltaics, robotics, healthcare, and aviation. The provided cybersecurity functions available include secure boot, secure (...)

Supported products & hardware
Firmware

USIT-3P-SECIC-PQC — Uni-Sentry SecIC-PQC Algorithms Firmware

Uni-Sentry's security solutions adopt PQC algorithms capable of resisting decryption threats posed by quantum computers to traditional cryptographic algorithms. The PQC firmware is co-optimized with Hardware Security Module (HSM), leveraging hardware acceleration and security enhancement to improve (...)

Supported products & hardware
Simulation model

AM68 TDA4VE TDA4AL TDA4VL BSDL MODEL

SPRM837.ZIP (13 KB) - BSDL model
Supported products & hardware
Simulation model

AM68A,TDA4VE,TDA4AL,TDA4VL IBIS MODEL

SPRM839.ZIP (1476 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
FCBGA (ALZ) 770 Ultra Librarian

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