SDAA410 June   2026 AM2611 , AM2612 , AM2612-Q1 , AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The Challenge of Determinism in Robotics
    2. 1.2 Why standard ethernet fails for real-time communication
      1. 1.2.1 Head-of-Line Blocking
      2. 1.2.2 Lack of Time Synchronization
      3. 1.2.3 No Traffic Scheduling
    3. 1.3 Time-Sensitive Networking (TSN) based proposed solution
      1. 1.3.1 What is TSN?
      2. 1.3.2 IEEE 1588 (802.1AS gPTP - generalized Precision Time Protocol)
      3. 1.3.3 IEEE 802.1Q (VLAN)
      4. 1.3.4 IEEE 802.1Qbu/Qbr (IET - Interspersing Express Traffic / Frame Preemption)
      5. 1.3.5 IEEE 802.1Qbv (EST - Enhancements for Scheduled Traffic)
      6. 1.3.6 CPSW Specific hardware features
  5. 2Sample Use Cases: Distributed Motion Control in Robotics
    1. 2.1 Representative scenario
    2. 2.2 Network Topology Requirements
      1. 2.2.1 Why Daisy-Chain?
      2. 2.2.2 Real world applications of daisy chain ethernet solutions
    3. 2.3 Communication Requirements
    4. 2.4 Test Implementation
  6. 3System Overview and Architecture
    1. 3.1 Hardware Architecture
      1. 3.1.1 AM261x LaunchPad
      2. 3.1.2 CPSW Sub-System overview:
    2. 3.2 Software architecture
  7. 4Sample Implementation
    1. 4.1 Standard Ethernet + CPSW InterVLAN routing
      1. 4.1.1 What is Inter-VLAN Routing
      2. 4.1.2 How This Implementation leverages Inter-VLAN Routing:
      3. 4.1.3 Test-1 Benchmarks
    2. 4.2 Integrating gPTP Time Synchronization (IEEE802.1AS)
      1. 4.2.1 What is PTP time synchronization?
      2. 4.2.2 How this implementation uses GPTP time synchronization
      3. 4.2.3 Test-2 Benchmarks
    3. 4.3 Integrating VLAN (IEEE802.1Q)
      1. 4.3.1 What is VLAN?
      2. 4.3.2 How this implementation leverages VLAN
      3. 4.3.3 Test-3 benchmarks
    4. 4.4 Integrating IET Frame Preemption (IEEE802.1Qbu/Qbr)
      1. 4.4.1 What is IET (Interspersed Express Traffic)?
      2. 4.4.2 How this implementation leverages IET
      3. 4.4.3 Test-4 Benchmarks
    5. 4.5 Integrating EST scheduling (IEEE802.1Qbv)
      1. 4.5.1 What is EST?
  8. 5Conclusion
  9. 6Challenges and Debug considerations
    1. 6.1 Network Topology Verification
    2. 6.2 Traffic Flow Analysis
    3. 6.3 Host Port Traffic Monitoring
    4. 6.4 PHY Link Management
    5. 6.5 Packets not forwarded to next node
    6. 6.6 Error Handling and Retries
    7. 6.7 High latency or Jitter for high priority packets
    8. 6.8 gPTP not synchronizing
  10. 7References

3.1 Hardware Architecture

The Texas Instruments AM261x is a microcontroller designed for industrial automation applications. Key features relevant to this implementation:

  • Arm Cortex-R5F CPU:

    Running at 500 MHz with Real-time processing capabilities and sufficient compute for networking stack and application logic, 256KB TCM memory per core, and 1.5MB SRAM. This ensures the performance of the gPTP software stack is optimal to help achieve a high synchronization accuracy.

  • CPSW3G Ethernet Switch:

    Three-port Gigabit Ethernet switch (one host port, two external ports), Hardware-accelerated Layer 2 switching and routing, TSN-capable switch supporting gPTP, IET (frame preemption), EST (time-aware scheduling), VLAN, Cut-through switching support at line rate, Address Lookup Engine (ALE) for MAC address filtering and VLAN management, Hardware Inter-VLAN routing with configurable routing rules, supports MII, RMII, RGMII interfaces with 10/100/1000M support.

This implementation uses a single ARM R5F Core, 100 Mbps RGMII interface over the two DP83869HM on-board LaunchPad PHYs.