SDAA444 October   2026 UCC23711

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Opto-Input Isolated Protection Gate Driver for SiC and IGBT
  6. 3Three Phase IGBT Inverter Design Guidelines for UCC23711
    1. 3.1 Overview
    2. 3.2 UCC23711 Input Current Resistor Configuration
    3. 3.3 UCC23711 Gate Drive Turn-on and Turn-off Peak Current
    4. 3.4 UCC23711 Active Miller Clamp
    5. 3.5 UCC23711 Supply Decoupling and Requirements
      1. 3.5.1 Input Side
      2. 3.5.2 Output Side
      3. 3.5.3 Output Supply Current
    6. 3.6 DESAT Circuit Configuration
    7. 3.7 UCC23711 Fault (FLT) Feedback
  7. 4System Test Results
    1. 4.1 Three-Phase IGBT Inverter under Test
    2. 4.2 UCC23711 Input Current Thresholds and Hysteresis
    3. 4.3 UCC23711 Propagation Delay
    4. 4.4 Phase U Turn-On and Turn-Off Slew Rates
    5. 4.5 UCC23711 Miller Clamp and Unipolar 15V Supply
    6. 4.6 UCC23711 DESAT Response and Soft Shut Down
    7. 4.7 Increasing the DESAT Charge Current
    8. 4.8 UCC23711 VDD UVLO Thresholds and Gate Drive Output
    9. 4.9 UCC23711 Gate Drive Power Consumption
  8. 5Summary
  9. 6References

3.5.2 Output Side

A positive VGE of typically 15 V is used to switch the IGBT well into saturation. For low power IGBTs, the Miller clamp functionality of the gate driver enables it to be operated with unipolar voltage (VEE connected to COM). For higher power IGBTs, negative values of VGE such as -8V as used in the design are used to keep the IGBT turned off and to prevent it from unintentional conducting due to noise transients, particularly during short circuit faults.

100nF caps C10, C6 and C8 are placed close to VDD-VEE, VDD-COM and VEE-COM to filter out high frequency noise.

The capacitors C5 and C7 are chosen to 2.2μF 50V, intentionally lower than the recommended 10μF 50V MLCC capacitors per UCC23711 datasheet. The reason is that the gate charge of the selected IGBT (U1) is rather low 0.3µC along with a maximum desired PWM switching frequency of 16kHz. The minimum capacitance of C5 (X7R, 0805) assuming a negative 10% tolerance and 15V DC bias is around 1.2µF, for C7 (X7R, 0805) at -8V DC bias the minimum capacitance is around 1.7µF. The maximum voltage drop across C5 is 0.25V (15V bias) and 0.17V (-8V bias) for C7, which is around 2% and within the tolerances of the 15V and -8V supply. For IGBTs with higher gate charges and tighter tolerances increase the decoupling capacitors respectively.