SGLS326D April   2006  – August 2025 TPS73601-EP , TPS73615-EP , TPS73618-EP , TPS73625-EP , TPS73630-EP , TPS73632-EP , TPS73633-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Power Dissipation Ratings
    3. 5.3 Electrical Characteristics
    4. 5.4 Typical Characteristics
  7. 6 Functional Block Diagrams
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Input and Output Capacitor Requirements
      2. 7.1.2  Output Noise
      3. 7.1.3  Board Layout Recommendation to Improve PSRR and Noise Performance
      4. 7.1.4  Internal Current Limit
      5. 7.1.5  Shutdown
      6. 7.1.6  Dropout Voltage
      7. 7.1.7  Transient Response
      8. 7.1.8  Reverse Current
      9. 7.1.9  Thermal Protection
      10. 7.1.10 Power Dissipation
      11. 7.1.11 Package Mounting
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.1.2 Output Noise

A precision band-gap reference is used to generate the internal reference voltage, VREF. This reference is the dominant noise source within the TPS736xx-EP and it generates approximately 32 μVRMS (10 Hz to
100 kHz) at the reference output (NR). The regulator control loop gains up the reference noise with the same gain as the reference voltage, so that the noise voltage of the regulator is approximately given by:

Equation 1. TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

Since the value of VREF is 1.2 V, this relationship reduces to:

Equation 2. TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

for the case of no CNR.

An internal 27-kΩ resistor in series with the noise reduction pin (NR) forms a low-pass filter for the voltage reference when an external noise reduction capacitor, CNR, is connected from NR to ground. For CNR = 10 nF, the total noise in the 10-Hz to 100-kHz bandwidth is reduced by a factor of ~3.2, giving the approximate relationship:

Equation 3. TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP

for CNR = 10 nF.

This noise reduction effect is shown as RMS Noise Voltage vs CNR in Figure 5-18.

The TPS73601-EP adjustable version does not have the noise-reduction pin available. However, connecting a feedback capacitor, CFB, from the output to the FB pin reduces output noise and improves load transient performance.

The TPS736xx-EP uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the NMOS pass element above VOUT. The charge pump generates ~250 μV of switching noise at ~4 MHz; however, charge-pump noise contribution is negligible at the output of the regulator for most values of IOUT and COUT.