SGLS326D April   2006  – August 2025 TPS73601-EP , TPS73615-EP , TPS73618-EP , TPS73625-EP , TPS73630-EP , TPS73632-EP , TPS73633-EP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Power Dissipation Ratings
    3. 5.3 Electrical Characteristics
    4. 5.4 Typical Characteristics
  7. Functional Block Diagrams
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Input and Output Capacitor Requirements
      2. 7.1.2  Output Noise
      3. 7.1.3  Board Layout Recommendation to Improve PSRR and Noise Performance
      4. 7.1.4  Internal Current Limit
      5. 7.1.5  Shutdown
      6. 7.1.6  Dropout Voltage
      7. 7.1.7  Transient Response
      8. 7.1.8  Reverse Current
      9. 7.1.9  Thermal Protection
      10. 7.1.10 Power Dissipation
      11. 7.1.11 Package Mounting
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Description

The TPS736xx-EP family of low-dropout (LDO) linear voltage regulators uses a new topology—an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR and allows operation without a capacitor. This family also provides high reverse blockage (low reverse current) and ground-pin current that is nearly constant over all values of output current.

The TPS736xx-EP uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages and low ground-pin current. Current consumption, when not enabled, is under 1μA and ideal for portable applications. The low output noise (30μVRMS with 0.1μF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.

TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP
TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP TPS73633-EP TPS736xxDBVzEP Estimated Device Life at Elevated Temperatures Electromigration
                    Fail Mode (TJ = TJA × W +
                        TA, Standard JESD 51 conditions)
TPS736xxDBVzEP Estimated Device Life at Elevated Temperatures Electromigration Fail Mode
(TJ = TJA × W + TA, Standard JESD 51 conditions)