SLAAE47A May   2022  – August 2022 DAC11001A , DAC11001B

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2DAC Error Sources
    1. 2.1 Offset Error
    2. 2.2 Gain Error
    3. 2.3 Integral Non Linearity (INL)
    4. 2.4 Noise Sources
  5. 3Error Sources from Reference
    1. 3.1 Initial Accuracy
    2. 3.2 Temperature Drift
    3. 3.3 Load Regulation Error
    4. 3.4 Line Regulation Error
    5. 3.5 0.1 - 10 Hz Peak-to-Peak Noise
    6. 3.6 Example Using REF7025
  6. 4Error Sources from Inverting and Non-Inverting Gain Stage
    1. 4.1 Input Offset Voltage Error
    2. 4.2 Input Offset Voltage Drift Error
    3. 4.3 Power Supply Rejection Ratio (PSRR) Error
    4. 4.4 Open Loop Gain Error
    5. 4.5 Resistor Tolerance Error
  7. 5Example Calculation using DAC11001A
  8. 6Error Summary
  9. 7References
  10. 8Revision History

3.5 0.1 - 10 Hz Peak-to-Peak Noise

The internally-generated noise of a voltage reference causes a dynamic error that degrades the signal to- noise ratio (SNR) of a data converter. Low frequency VREF noise is specified over the 0.1 Hz to 10 Hz bandwidth as a peak-to-peak value (in µV or ppm). Filtering below 10 Hz is impractical, so the low-frequency noise contributes directly to the total reference error.

Equation 8. 0.1 to 10Hz noiseppm=0.1 to 10Hz noiseµVPPOutput Voltage×106

When calculating the total error in VREF it is best to separate error specifications where a maximum value is guaranteed (TC, initial accuracy, load regulation, line regulation) and those where only a typical value is provided (0.1 Hz to 10 Hz noise, thermal hysteresis, and long-term stability). Other than initial accuracy, the guaranteed specifications are all linear coefficients and their contribution to the total error can be calculated based on the operating ranges of the reference (temperature range, load current, and input voltage).