SLAAED5 june   2023 AFE11612-SEP , INA240-SEP , OPA4H199-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. LDMOS and GaN Power Amplifier FET PA Basics
  5. VGS Compensation
  6. Sequencing
  7. An Integrated PA Biasing Solution
  8. Negative GaN Biasing
  9. VDRAIN Switching Circuit
  10. Controlled Gate Sequencing Circuit
  11. VDRAIN Monitoring
  12. IDQ Monitoring
  13. 10External Negative Power Supply Monitoring
  14. 11PA Temperature Monitoring
  15. 12Summary
  16. 13References

IDQ Monitoring

Monitoring the drain quiescent current (IDQ) can detect if the PA is efficiently conducting the desired current. An external INA can be used to convert current measurements into voltage outputs for the AFE11612-SEP. The INA used in this example circuit is the INA240-SEP, which features a 20 V/V gain. With the following equation, the ideal voltage differential across the resistor is calculated, where VDIFF is the maximum differential-input voltage across the INA’s inputs, VOUT is the ADC range of 2.5 V or 5 V, and gain is 20 V/V. This calculation gives a maximum voltage differential of 125 mV for 2.5-V ADC range or 250 mV for 5-V ADC range across the resistor.

VDIFF = VOUT / GAIN

Next, use the following equation to calculate resistance. RSENSE is the shunt resistor value; VDIFF is the previously calculated maximum voltage drop of 125 mV or 250 mV; and IDQ_MAX is the maximum current draw of the power amplifier.

RSENSE = VDIFF / IDQ_MAX

Similar to the VDRAIN monitoring circuit, an external RC filter is required for current charging.

GUID-20230608-SS0I-GG7K-BPNJ-09VW3Z9JZ86S-low.svgFigure 9-1 IDQ Monitor Circuit