SLASFJ7A July   2024  â€“ February 2026 MSPM0C1105-Q1 , MSPM0C1106-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Device Comparison
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
      11.      22
      12.      23
    4. 6.4 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 Low Frequency Crystal/Clock
      4. 7.9.4 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Electrical Characteristics
      2. 7.14.2 Voltage Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 I2C
      1. 7.16.1 I2C Characteristics
      2. 7.16.2 I2C Filter
      3. 7.16.3 I2C Timing Diagram
    17. 7.17 SPI
      1. 7.17.1 SPI
      2. 7.17.2 SPI Timing Diagram
    18. 7.18 UART
    19. 7.19 TIMx
    20. 7.20 Emulation and Debug
      1. 7.20.1 SWD Timing
  9. Detailed Description
    1. 8.1  Overview
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA_B
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 Low-Frequency Sub System (LFSS)
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 Security
    19. 8.19 CRC
    20. 8.20 UART
    21. 8.21 I2C
    22. 8.22 SPI
    23. 8.23 IWDT
    24. 8.24 WWDT
    25. 8.25 RTC_B
    26. 8.26 Timers (TIMx)
    27. 8.27 Device Analog Connections
    28. 8.28 Input/Output Diagrams
    29. 8.29 Serial Wire Debug Interface
    30. 8.30 DEBUGSS
    31. 8.31 Device Factory Constants
    32. 8.32 Identification
  10. Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Table 6-3 Analog to Digital Converter (ADC) Signal Descriptions
SIGNAL
NAME
PIN
TYPE
DESCRIPTION PT PIN RGZ PIN RHB PIN DGS28 PIN RGE PIN DGS20 PIN RUK PIN
ADC0_VREF+ A ADC0 voltage reference (VREF) power supply 43 43 27 26 19 18 16
ADC0_VREF- A ADC0 voltage reference (VREF) ground supply 39 39 25 24 17
ADC0_0 A ADC0 analog input channel 0 47 47 31 2 2 20
ADC0_1 A ADC0 analog input channel 1 46 46 30 1 22 1 19
ADC0_2 A ADC0 analog input channel 2 45 45 29 28 21 20 18
ADC0_3 A ADC0 analog input channel 3 44 44 28 27 20 19 17
ADC0_4 A ADC0 analog input channel 4 35 35 24 23 16 16 14
ADC0_5 A ADC0 analog input channel 5 42 42
ADC0_6 A ADC0 analog input channel 6 41 41
ADC0_7 A ADC0 analog input channel 7 40 40 26 25 18 17 15
ADC0_8 A ADC0 analog input channel 8 39 39 25 24 17
ADC0_9 A ADC0 analog input channel 9 38 38
ADC0_10 A ADC0 analog input channel 10 37 37
ADC0_11 A ADC0 analog input channel 11 36 36
ADC0_12 A ADC0 analog input channel 12 33 33 22 21 14 14 12
ADC0_13 A ADC0 analog input channel 13 32 32 21 20 13 13 11
ADC0_14 A ADC0 analog input channel 14 31 31 20 19 12 12 10
ADC0_15 A ADC0 analog input channel 15 30 30 19 18 11
ADC0_16 A ADC0 analog input channel 16 29 29 18 17
ADC0_17 A ADC0 analog input channel 17 28 28 17
ADC0_18 A ADC0 analog input channel 18 27 27 16
ADC0_19 A ADC0 analog input channel 19 26 26
ADC0_20 A ADC0 analog input channel 20 25 25
ADC0_21 A ADC0 analog input channel 21 24 24
ADC0_22 A ADC0 analog input channel 22 34 34 23 22 15 15 13
ADC0_23 A ADC0 analog input channel 23 21 21
ADC0_24 A ADC0 analog input channel 24 20 20
ADC0_25 A ADC0 analog input channel 25 19 19 15 16 10 11 9
ADC0_26 A ADC0 analog input channel 26 43 43 27 26 19 18 16