SLASFJ7A July   2024  – February 2026 MSPM0C1105-Q1 , MSPM0C1106-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
      11.      22
      12.      23
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 Low Frequency Crystal/Clock
      4. 7.9.4 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Electrical Characteristics
      2. 7.14.2 Voltage Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 I2C
      1. 7.16.1 I2C Characteristics
      2. 7.16.2 I2C Filter
      3. 7.16.3 I2C Timing Diagram
    17. 7.17 SPI
      1. 7.17.1 SPI
      2. 7.17.2 SPI Timing Diagram
    18. 7.18 UART
    19. 7.19 TIMx
    20. 7.20 Emulation and Debug
      1. 7.20.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA_B
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 Low-Frequency Sub System (LFSS)
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 Security
    19. 8.19 CRC
    20. 8.20 UART
    21. 8.21 I2C
    22. 8.22 SPI
    23. 8.23 IWDT
    24. 8.24 WWDT
    25. 8.25 RTC_B
    26. 8.26 Timers (TIMx)
    27. 8.27 Device Analog Connections
    28. 8.28 Input/Output Diagrams
    29. 8.29 Serial Wire Debug Interface
    30. 8.30 DEBUGSS
    31. 8.31 Device Factory Constants
    32. 8.32 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

1 Features

  • AEC-Q100 Grade 1 qualified for automotive applications
  • Core
    • Arm® 32-bit Cortex®-M0+ CPU with memory protection unit, frequency up to 32MHz
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 64KB of flash memory
    • 8KB of SRAM
  • High-performance analog peripherals
    • 12-bit 1.6 Msps analog-to-digital converter (ADC), up to 27 external channels
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Comparator (COMP) with 8-bit reference DAC
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 91µA/MHz (CoreMark)
    • STANDBY 2µA and SRAM and registers fully retained
    • SHUTDOWN: 68nA with I/O wake-up
  • Intelligent digital peripherals
    • 3-channel DMA controller
    • 7-channel event fabric signaling system
    • Five timers supporting up to 18 PWM outputs, all operational down to STANDBY mode

      • One 16-bit advanced timer with deadband and the timer frequency up to 64Mhz

      • One 16-bit general purpose timer with 4 capture/compares

      • Three 16-bit general-purpose timers with 2 capture/compares
    • Window-watchdog timer (WWDT)
    • Independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
    • BEEPER generating 1/2/4/8kHz square wave to drive an external beeper
  • Communication interfaces
    • Three UART modules, with one supporting LIN, IrDA, DALI, smart card, Manchester
    • Two I2C modules supporting SMBus/PMBus and wakeup from STOP mode, supporting up to FM+ (1Mbps)

    • One SPI module supporting up to 16Mbps

  • Clock system
    • Internal 32MHz oscillator with -2.1% to 1.6% accuracy (SYSOSC)
    • Internal 32kHz oscillator (LFOSC) with ±3% accuracy
    • External 4MHz to 32MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External Low Frequency (LF) and High Frequency (HF) digital clock inputs
    • Digital clock output
  • Data integrity and encryption
    • Cyclic redundancy checker (CRC-16)
  • Flexible I/O features
    • Up to 45 total GPIOs
    • Two 5V-tolerant open-drain IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options(1)
    • 48-pin LQFP (PT), VQFN (RGZ)
    • 32-pin VQFN (RHB)
    • 28-pin VSSOP (DGS28)
    • 24-pin VQFN (RGE)
    • 20-pin WQFN (RUK), VSSOP (DGS20)
  • Family members (also see Device Comparison)
    • MSPM0C1106-Q1: 64KB of flash, 8KB of RAM
    • MSPM0C1105-Q1: 32KB of flash, 8KB of RAM
  • Development kits and software (also see Tools and Software)
    • LP-MSPM0C1106 LaunchPad™ development kit
    • MSP Software Development Kit (SDK)
1. QFN packages have wettable flanks.