SLAU678C March   2016  – November 2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Getting Started
    1. 1.1 Introduction
    2. 1.2 Key Features
    3. 1.3 What's Included
      1. 1.3.1 Kit Contents
      2. 1.3.2 Software Examples
    4. 1.4 First Steps: Out-of-Box Experience
      1. 1.4.1 Connecting to the Computer
      2. 1.4.2 Running the Out-of-Box Demo
        1. 1.4.2.1 Live Temperature Mode
        2. 1.4.2.2 FRAM Data Log Mode
        3. 1.4.2.3 SD Card Data Log Mode
    5. 1.5 Next Steps: Looking Into the Provided Code
  4. 2Hardware
    1. 2.1 Block Diagram
    2. 2.2 Hardware Features
      1. 2.2.1 MSP430FR5994 MCU
      2. 2.2.2 eZ-FET Onboard Debug Probe With EnergyTrace++ Technology
      3. 2.2.3 Debug Probe Connection: Isolation Jumper Block
      4. 2.2.4 Application (or Backchannel) UART
      5. 2.2.5 Special Features
        1. 2.2.5.1 microSD Card
        2. 2.2.5.2 220-mF Super Capacitor
    3. 2.3 Power
      1. 2.3.1 eZ-FET USB Power
      2. 2.3.2 BoosterPack Plug-in Module and External Power Supply
      3. 2.3.3 Super Cap (C1)
        1. 2.3.3.1 Charging the Super Cap
        2. 2.3.3.2 Using the Super Cap
        3. 2.3.3.3 Disabling the Super Cap
    4. 2.4 Measure MSP430 Current Draw
    5. 2.5 Clocking
    6. 2.6 Using the eZ-FET Debug Probe With a Different Target
    7. 2.7 BoosterPack Plug-in Module Pinout
    8. 2.8 Design Files
      1. 2.8.1 Hardware
      2. 2.8.2 Software
    9. 2.9 Hardware Change Log
  5. 3Software Examples
    1. 3.1 Out-of-Box Software Example
      1. 3.1.1 Source File Structure
      2. 3.1.2 Out-of-Box Demo GUI
      3. 3.1.3 Power Up and Idle
      4. 3.1.4 Live Temperature Mode
      5. 3.1.5 FRAM Log Mode
      6. 3.1.6 SD Card Log Mode
    2. 3.2 Blink LED Example
      1. 3.2.1 Source File Structure
    3. 3.3 BOOSTXL-AUDIO Audio Record and Playback Example
      1. 3.3.1 Source File Structure
      2. 3.3.2 Operation
    4. 3.4 Filtering and Signal Processing With LEA Reference Design Example
      1. 3.4.1 Source File Structure
      2. 3.4.2 Operation
    5. 3.5 Emulating EEPROM Reference Design Example
      1. 3.5.1 Source File Structure
      2. 3.5.2 Operation
  6. 4Resources
    1. 4.1 Integrated Development Environments
      1. 4.1.1 TI Cloud Development Tools
        1. 4.1.1.1 TI Resource Explorer Cloud
        2. 4.1.1.2 Code Composer Studio Cloud
      2. 4.1.2 Code Composer Studio™ IDE
      3. 4.1.3 IAR Embedded Workbench for MSP430
    2. 4.2 LaunchPad Websites
    3. 4.3 MSPWare and TI Resource Explorer
    4. 4.4 FRAM Utilities
      1. 4.4.1 Compute Through Power Loss (CTPL)
    5. 4.5 MSP430FR5994 MCU
      1. 4.5.1 Device Documentation
      2. 4.5.2 MSP430FR5994 Code Examples
      3. 4.5.3 MSP430 Application Notes and TI Reference Designs
    6. 4.6 Community Resources
      1. 4.6.1 TI E2E Support Forums
      2. 4.6.2 Community at Large
  7. 5FAQ
  8. 6Schematics
  9. 7Revision History

Operation

The EEPROM emulation is configured to use I2C or SPI protocol in Slave mode as indicated by Figure 3-7 and Figure 3-8. It would typically be connected to a host processor which would act as the master. This implementation, unlike traditional EEPROM, requires no caching after several hundred bytes. The host could continuously write data to memory once the communication is initiated. And the data is immediately written to memory. This means that the application could continuously stream data with much higher throughput. The SPI operation also includes DMA.

GUID-2E6DA55B-5A8D-42DA-BE14-02EDEAC89568-low.gifFigure 3-7 EEPROM SPI Interface Block Diagram
GUID-8205141D-73C0-4EC0-9E43-F7E9471AAA2E-low.gifFigure 3-8 EEPROM I2C Interface Block Diagram

This reference design also emulates industry standard EEPROM protocols such as I2C and SPI, as well as a write protection pin to ensure that the device is protected from any writes. On top of EEPROM emulation, the reference design periodically samples the ADC for the latest VCC and temperature and stores it in FRAM at a low priority. When the host application requests the data, it is immediately available. The sensor data is currently configured to periodically sample every second and can be custom tailored for the application. The sensor reading does not block the EEPROM emulation. The EEPROM emulation is the highest priority function. For more information on this example, visit the reference design page.