SLLA664 March   2025 MCF8315A , MCF8315C , MCF8315C-Q1 , MCF8315D , MCF8316A , MCF8316C-Q1 , MCF8316D , MCF8329A , MCT8315A , MCT8316A , MCT8316A-Q1 , MCT8329A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2EEPROM Read and Write Procedure
    1. 2.1 EEPROM Read
    2. 2.2 EEPROM Write
    3. 2.3 CRC
  6. 3Summary
  7. 4References

2.2 EEPROM Write

In MCx devices, the EEPROM write procedure (also shown in Figure 2-1) is as follows,

  1. Stop driving the motor to place the device in idle/standby state. In MCF devices, motor can be stopped by writing 0x8000000 to ALGO_DEBUG1 register located at 0xEC. In MCT devices, motor can be stopped by writing 0x00008000 to DEVICE_CTRL register located at 0xE8.
  2. Issue a clear fault command to clear faults, in case the device encountered a fault during motor stop operation. In MCF devices, faults can be cleared by writing 0x30000000 to ALGO_CTRL1 register located at 0xEA. In MCT devices, faults can be cleared by writing 0x30000000 to ALGO_CTRL1 register located at 0xE6.
  3. Write the required values of the EEPROM registers to the corresponding shadow/RAM locations between 0x80-0xAE
  4. Issue an EEPROM write command by writing 0x8A500000 into ALGO_CTRL1 register (at 0xEA in MCF and 0xE6 in MCT devices) to write the shadow/RAM registers' (located between 0x000080-0x0000AE) contents into corresponding EEPROM registers.
  5. Wait for 750ms after issuing an EEPROM write command.
  6. After 750ms, read the ALGO_CTRL1 register value; a read-back value of 0x00000000 indicates that the EEPROM write is successful.
EEPROM Write Procedure Figure 2-2 EEPROM Write Procedure
Note: EEPROM Write Do's and Dont's
  • EEPROM write needs to be issued only when device is in idle state (not driving/powering the motor)
  • Device supply (VM) needs to be ≥ 6V and all power rails (AVDD, FB_BK and DVDD) needs to stay within the data sheet specified operating limits throughout the EEPROM write process. An undervoltage fault on any power rail during the EEPROM write process can result in incomplete EEPROM write that can cause unexpected device behavior on subsequent power-up/wake-up.
  • TI does not recommend writing to the EEPROM upon every power-up/wake-up due to aging/write cycle limitations on number of EEPROM writes. Refer to the device data sheet for maximum allowed EEPROM write cycles. Repetitive register setting changes can be done at shadow/RAM locations (and not written to EEPROM); only default configurations need to be written to EEPROM (at first power-up only).
  • After a successful EEPROM write, a power reset is needed for all the EEPROM setting changes to take effect.