SLLA682 July   2025 TDP142

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Device Configuration
  6. 3Equalization Selection
  7. 4Equalization Selection Example
  8. 5AUXP/N and SNOOPENZ Configuration
  9. 6Layout Guidelines
    1. 6.1 GND Stitching
    2. 6.2 AC-Coupling Capacitors
    3. 6.3 Layout Example
  10. 7Summary
  11. 8References

4 Equalization Selection Example

TDP142 Sink Side Equalization Example Figure 4-1 TDP142 Sink Side Equalization Example

This section discusses an example to select equalization for different trace length. Figure 4-1 shows an example sink side application of TDP142. The following method is used to select equalization value for this sink side application:

  • PCB Trace of Length C = 8 inches FR4 PCB Trace (5.9dB Loss at 4.05GHz). DPEQ setting used = Setting Number 5 (6.5dB).

Other factors such as layout quality and DP driver and receiver quality can require the equalization settings to be adjusted higher or lower for best performance. The previous method is recommended to be used for selecting initial configuration settings based on system board trace lengths.