SLLSF31B June   2025  – July 2025 TCAN1162-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings IEC Specification
    4. 5.4 Recomended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Power Supply Characteristics
    7. 5.7 Electrical Characteristics
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VSUP Pin
      2. 7.3.2  VFLT Pin
      3. 7.3.3  Digital Inputs and Outputs
      4. 7.3.4  Digital Control and Timing
      5. 7.3.5  VIO Pin
      6. 7.3.6  GND
      7. 7.3.7  INH Pin
      8. 7.3.8  WAKE Pin
      9. 7.3.9  CAN Bus Pins
      10. 7.3.10 Local Faults
        1. 7.3.10.1 TXD Dominant Timeout (TXD DTO)
        2. 7.3.10.2 Thermal Shutdown (TSD)
        3. 7.3.10.3 Under/Over Voltage Lockout
        4. 7.3.10.4 Unpowered Devices
        5. 7.3.10.5 Floating Terminals
        6. 7.3.10.6 CAN Bus Short Circuit Current Limiting
        7. 7.3.10.7 Sleep Wake Error Timer
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Mode Description
        1. 7.4.1.1 Normal Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Sleep Mode
          1. 7.4.1.3.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 7.4.1.3.2 Local Wake-Up (LWU) via WAKE Input Terminal
        4. 7.4.1.4 Fail-safe Mode
      2. 7.4.2 CAN Transceiver
        1. 7.4.2.1 CAN Transceiver Operation
        2. 7.4.2.2 CAN Transceiver Modes
          1. 7.4.2.2.1 CAN Off Mode
          2. 7.4.2.2.2 CAN Autonomous: Inactive and Active
          3. 7.4.2.2.3 CAN Active
        3. 7.4.2.3 Driver and Receiver Function Tables
        4. 7.4.2.4 CAN Bus States
  9. 8 Application Information
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Bus Loading, Length and Number of Nodes
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 CAN Termination
    3. 8.3 Application Curves
    4. 8.4 Power Supply Requirements
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6 Parameter Measurement Information

TCAN1162-Q1 ISUP Test Circuit Figure 6-1 ISUP Test Circuit
TCAN1162-Q1 Driver Test Circuit and Measurement Figure 6-2 Driver Test Circuit and Measurement
TCAN1162-Q1 Receiver Test Circuit and Measurement Figure 6-3 Receiver Test Circuit and Measurement
TCAN1162-Q1 Transmitter and Receiver Timing Behavior Test Circuit and Measurement Figure 6-4 Transmitter and Receiver Timing Behavior Test Circuit and Measurement
TCAN1162-Q1 TXD Dominant Timeout Test Circuit and Measurement Figure 6-5 TXD Dominant Timeout Test Circuit and Measurement
TCAN1162-Q1 Driver Short-Circuit Current Test and Measurement Figure 6-6 Driver Short-Circuit Current Test and Measurement
TCAN1162-Q1 tPOWER_UP Timing Measurement Figure 6-7 tPOWER_UP Timing Measurement
TCAN1162-Q1 tWAKE While Monitoring INH Output Figure 6-8 tWAKE While Monitoring INH Output
Figure 6-9 Test Signal Definition for Bias Reaction Time Measurement