SLLSF86D May   2018  – August 2026 ISOW1412 , ISOW1432

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Supply Current Characteristics at VISOOUT = 3.3 V
    11. 6.11 Supply Current Characteristics at  VISOOUT = 5 V
    12. 6.12 Switching Characteristics at VISOOUT = 3.3 V
    13. 6.13 Switching Characteristics at VISOOUT = 5 V
    14. 6.14 Insulation Characteristics Curves
    15. 6.15 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Power Isolation
    3. 8.3 Signal Isolation
    4. 8.4 RS-485
    5. 8.5 Functional Block Diagram
    6. 8.6 Feature Description
      1. 8.6.1 Power-Up and Power-Down Behavior
      2. 8.6.2 Protection Features
      3. 8.6.3 Failsafe Receiver
      4. 8.6.4 Glitch-Free Power Up and Power Down
    7. 8.7 Device Functional Modes
    8. 8.8 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate, Bus Length and Bus Loading
        2. 9.2.2.2 Stub Length
      3. 9.2.3 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.2 Power Isolation

The integrated isolated DC-DC converter uses advanced circuit and on-chip layout techniques to reduce radiated emissions and achieve up to 46% typical efficiency. The integrated transformer uses thin film polymer as the insulation barrier. Output voltage of power converter can be controlled to 3.3V or 5V using MODE pin. In case bus communication is not needed, the DC-DC converter can be switched off using EN (enable) pin to save power. The output voltage, VISOOUT, is monitored and feedback information is conveyed to the primary side through a dedicated isolation channel. The duty cycle of the primary switching stage is adjusted accordingly. The fast feedback control loop of the power converter provides low overshoots and undershoots during load transients. Undervoltage lockout (UVLO) with hysteresis is integrated on the VIO, VDD and VISOOUT supplies which provides robust fails-safe system performance under noisy conditions. An integrated soft-start mechanism provides controlled inrush current and avoids any overshoot on the output during power up.