SLLSF86D May   2018  – August 2026 ISOW1412 , ISOW1432

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Supply Current Characteristics at VISOOUT = 3.3 V
    11. 6.11 Supply Current Characteristics at  VISOOUT = 5 V
    12. 6.12 Switching Characteristics at VISOOUT = 3.3 V
    13. 6.13 Switching Characteristics at VISOOUT = 5 V
    14. 6.14 Insulation Characteristics Curves
    15. 6.15 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Power Isolation
    3. 8.3 Signal Isolation
    4. 8.4 RS-485
    5. 8.5 Functional Block Diagram
    6. 8.6 Feature Description
      1. 8.6.1 Power-Up and Power-Down Behavior
      2. 8.6.2 Protection Features
      3. 8.6.3 Failsafe Receiver
      4. 8.6.4 Glitch-Free Power Up and Power Down
    7. 8.7 Device Functional Modes
    8. 8.8 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate, Bus Length and Bus Loading
        2. 9.2.2.2 Stub Length
      3. 9.2.3 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics

Over recommended operating conditions, typical values are at VDD = VIO = 3.3V and TA =25°C, GND1 = GNDIO, GND2 = GISOIN (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Device
VISOOUT Isolated output supply voltage MODE=GND2, DE=GND1, D, RE and IN floating 3.135 3.3V 3.465 V
Isolated output supply voltage MODE=VISOOUT, DE=GND1, D, RE and IN floating 4.75 5 5.25 V
VOH Output high voltage on OUT pin VIO = 5V ± 10%, IOH = –4mA, IN=VISOIN VIO – 0.4 V
Output high voltage on OUT pin VIO = 3.3V ± 10% , IOH = –2mA, IN=VISOIN VIO – 0.3 V
Output high voltage on OUT pin VIO = 2.5V ± 10% , IOH = –1mA, IN=VISOIN VIO – 0.2 V
Output high voltage on OUT pin VIO = 1.8V ± 5%, IOH = –1mA, IN=VISOIN VIO – 0.2 V
VOL Output low voltage on OUT pin VIO = 5V ± 10%, IOL = 4mA, IN=GND2 0.4 V
Output low voltage on OUT pin VIO = 3.3V ± 10% , IOL = 2mA, IN=GND2 0.3 V
Output low voltage on OUT pin VIO = 2.5V ± 10%, IOL = 1mA, IN=GND2 0.2 V
Output low voltage on OUT pin VIO = 1.8V ± 5%, IOL = 1mA, IN=GND2 0.2 V
II Input current, IN IN at 0V or VISOIN –25 25 µA
II Input current, EN EN at 0V or VIO –25 25 µA
|CMH| High-level common-mode transient immunity Driver and receiver path, VCM = 1000V, see Figure 7-4 100 kV/µs
|CML| Low-level common-mode transient immunity Driver and receiver path, VCM = 1000V, see Figure 7-4 100 kV/µs
Driver
|VOD| Differential output voltage magnitude Unloaded bus, VDD = 3V to 3.6V with MODE=GND2, or 4.5V to 5.5V with MODE= VISOOUT 1.5 VISOIN V
RL = 60Ω, –7V ≤ VTEST ≤ 12V (see Figure 7-1), VDD = 3V to 3.6V, MODE = GND2 1.5 VISOIN
RL = 100Ω (see Figure 7-2) (RS-422 load), VDD = 3V to 3.6V, MODE = GND2 2 VISOIN
RL = 54 Ω (see Figure 7-2) (RS-485 load), VDD = 3V to 3.6V, MODE = GND2 1.5 VISOIN
|VOD| Differential output voltage magnitude RL = 54Ω, VDD = 4.5V to 5.5V, MODE = VISOOUT , see Figure 7-2 2.1 VISOIN V
|VOD| Differential output voltage magnitude RL = 100Ω (see Figure 7-2) (RS-422 load), VDD = 4.5V to 5.5V, MODE = VISOOUT 2.1 VISOIN V
|VOD| Differential output voltage magnitude RL = 60Ω, –7V ≤ VTEST ≤ 12V (see Figure 7-1), VDD = 4.5V to 5.5V, MODE = VISOOUT 2.1 VISOIN V
Δ|VOD| Change in differential output voltage between the two states RL = 54 Ω or 100 Ω (see Figure 7-2) –200 200 mV
VOC Common-mode output voltage RL = 54Ω or 100Ω (see Figure 7-2) 1 0.5 × VISOIN 3 V
ΔVOC(SS) Change in steady-state common-mode output voltage between the two states RL = 54Ω or 100Ω (see Figure 7-2) –200 200 mV
VOC(PP) Peak-to-peak common mode output voltage RL = 54Ω or 100Ω, VISOIN=VISOOUT=3.3V, see Figure 7-2 400 mV
IOS Short-circuit output current VDE = VIO, VD=VIO or GND1, –7V ≤ Y or Z ≤ 12V, or Y shorted to Z, see Figure 7-10 180 mA
II Input current , D, DE VD, VDE at 0V or VIO –25 25 µA
Receiver
II1 Bus input current VDE = 0V, VISOIN = 0V or 3.3V or 5V, ISOW1412 or ISOW1432, VA or VB = –7V to 12V, other input at 0V –100 125 µA
VTH+ Positive-going input-threshold voltage –7V ≤ VCM ≤ 12V See(1) –78 –20 mV
VTH– Negative-going input-threshold voltage –7V ≤ VCM ≤ 12V –200 –141 See(1) mV
Vhys Input hysteresis (VTH+ – VTH–) –7V ≤ VCM ≤ 12V 40 63 mV
VOH Output high voltage on R pin VIO = 5V ± 10%, IOH = –4mA, VID ≥ 200mV VIO – 0.4 V
VIO = 3.3V ± 10%, IOH = –2mA, VID ≥ 200mV VIO – 0.3
VIO = 2.5V ± 10% , IOH = –1mA, VID ≥ 200mV VIO – 0.2
VIO = 1.8V ± 5%, IOH = –1mA, VID ≥ 200mV VIO – 0.2
VOL Output low voltage on R pin VIO = 5V ± 10%, IOL = 4mA, VID ≤ –200mV 0.4 V
VIO = 3.3V ± 10%, IOL = 2mA, VID ≤ –200mV 0.3
VIO = 2.5V ± 10% , IOL = 1mA, VID ≤ –200mV 0.2
VIO = 1.8V ± 5%, IOL = 1mA, VID ≤ –200mV 0.2
IOZ Output high-impedance current on R pin VR = 0V or VIO, VRE = VIO –1 1 µA
II(RE) Input current on RE pin VRE at 0V or VIO –25 25 µA
(1) The VTH+ voltage is specified to be greater than the VTH– voltage by at least the Vhys voltage under any specific conditions.