SLLSFP2 September   2024 TUSB1021-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.2
      2. 7.3.2 4-Level Inputs
      3. 7.3.3 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 USB 3.2 2:1 MUX Description
      2. 7.4.2 Linear EQ Configuration
      3. 7.4.3 USB3.2 Modes
      4. 7.4.4 Operation Timing – Power Up
    5. 7.5 Programming
      1. 7.5.1 TUSB1021-Q1 I2C Target Behavior
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 ESD Protection
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Register Maps
    1. 9.1 General Register (address = 0x0A) [reset = 00000001]
    2. 9.2 USB3.2 Control/Status Registers (address = 0x20) [reset = 00000000]
    3. 9.3 USB3.2 Control/Status Registers (address = 0x21) [reset = 00000000]
    4. 9.4 USB3.2 Control/Status Registers (address = 0x22) [reset = 00000000]
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

TUSB1021-Q1 RGF Package, 40-Pin (VQFN) (Top View)Figure 4-1 RGF Package, 40-Pin (VQFN) (Top View)
Table 4-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMENO.
RSVD132OReserved. Leave unconnected.
RSVD231OReserved. Leave unconnected.
RSVD329OReserved. Leave unconnected.
RSVD428OReserved. Leave unconnected.
RSVD526OReserved. Leave unconnected.
RSVD625OReserved. Leave unconnected.
RSVD723OReserved. Leave unconnected.
RSVD822OReserved. Leave unconnected.
TX1n2Diff ODifferential negative output. Connect to the TX1n pin on the Type-C receptacle through an external AC-coupling capacitor.
TX1p1Diff ODifferential positive output. Connect to the TX1p pin on the Type-C receptacle through an external AC-coupling capacitor.
RX1n5Diff IDifferential negative input. Connect to the RX1n pin on the Type-C receptacle through an external AC-coupling capacitor.
RX1p4Diff IDifferential positive input. Connect to the RX1p pin on the Type-C receptacle through an external AC-coupling capacitor.
RX2p8Diff IDifferential positive input. Connect to the RX2p pin on the Type-C receptacle through an external AC-coupling capacitor.
RX2n7Diff IDifferential negative input. Connect to the RX2p pin on the Type-C receptacle through an external AC-coupling capacitor.
TX2p11Diff ODifferential positive output. Connect to the TX2p pin on the Type-C receptacle through an external AC-coupling capacitor.
TX2n10Diff ODifferential negative output. Connect to the TX2n pin on the Type-C receptacle through an external AC-coupling capacitor.
SSTXp40Diff IDifferential positive input. Connect to the USB3.2 Host/Device transmitter through an external AC-coupling capacitor.
SSTXn39Diff IDifferential negative input. Connect to the USB3.2 Host/Device transmitter through an external AC-coupling capacitor.
SSRXp37Diff ODifferential positive output. Connect to the USB3.2 Host/Device receiver through an external AC-coupling capacitor.
SSRXn36Diff ODifferential negative output. Connect to the USB3.2 Host/Device receiver through an external AC-coupling capacitor.
EQ164 Level IThis pin along with EQ0 sets the USB receiver equalizer gain for RX1 and RX2. If not used, this pin can be left unconnected.
EQ034 Level IThis pin along with EQ1 sets the USB receiver equalizer gain for RX1 and RX2. If not used, this pin can be left unconnected.
EN212 Level I
(PD)		Device Enable. For normal operation, pull this pin up to 3.3V through a 10k to 50kΩ resistor.
TEST2242 Level ITest4. Connect directly to GND or pulldown with a 100k or less resistor.
I2C_EN94 Level II2C Programming Mode or GPIO Programming Select. I2C is only disabled when this pin is "0".
0 = GPIO mode (I2C disabled)
R = TI Test Mode (I2C enabled at 3.3V)
F = I2C enabled at 1.8V
1 = I2C enabled at 3.3V.
RSVD916I/O, CMOSReserved. Leave unconnected.
RSVD1017I/O, CMOSReserved. Leave unconnected.
RSVD1118I/O, CMOSReserved. Leave unconnected.
RSVD1219I/O, CMOSReserved. Leave unconnected.
TEST3344 Level ITest pin. Leave unconnected.
A1274 Level IWhen I2C_EN ≠ "0", this pin also sets the TUSB1021-Q1 I2C address.
SSEQ1354 Level IAlong with SSEQ0, sets the USB receiver equalizer gain for SSTXP/N receiver.
SSEQ0/A0304 Level IAlong with SSEQ1, sets the USB receiver equalizer gain for SSTXP/N receiver. When I2C_EN ≠ "0", this pin also sets the TUSB1021-Q1 I2C address. If I2C_EN = "F", then this pin must be set to "F" or "0".
FLIP/SCL132 Level I
(Failsafe)
(PD)		When I2C_EN = "0", this is Flip control pin,
L: normal orientation
H: flip orientation
When I2C_EN != "0", this pin is I2C clock. When used for a I2C clock, pull up to the VCC I2C supply on the I2C controller.
CTL0/SDA142 Level I
(Failsafe)
(PD)		When I2C_EN = "0", this is a USB3.2 control pin,
L: USB disabled
H: USB enabled
When I2C_EN != "0", this pin is I2C data. When used for I2C data, pull up to the VCC I2C supply on the I2C controller.
TEST1152 Level I
(PD)		Test. Leave unconnected or pulldown to GND.
VCC12P3.3V Power Supply
VCC20P3.3V Power Supply
VCC38P3.3V Power Supply
NC33NCNo connect pin. Leave open.
GNDThermal PadGGround
(1) I = input, O = output, Diff = differential, P = power, NC = no connection, G = ground