SLLSG02A February   2026  – March 2026 ISOW3080 , ISOW3086

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Supply Current Characteristics at VISOOUT = 3.3 V (ISOW308x)
    11. 6.11 Supply Current Characteristics at VISOOUT = 5 V (ISOW308xP)
    12. 6.12 Switching Characteristics at VISOOUT = 3.3 V (ISOW308x)
    13. 6.13 Switching Characteristics at VISOOUT = 5 V (ISOW308xP)
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Power Isolation
    3. 8.3 Signal Isolation
    4. 8.4 RS-485
    5. 8.5 Functional Block Diagram
    6. 8.6 Feature Description
      1. 8.6.1 Power-Up and Power-Down Behavior
      2. 8.6.2 Protection Features
      3. 8.6.3 Failsafe Receiver
      4. 8.6.4 Glitch-Free Power Up and Power Down
    7. 8.7 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate, Bus Length and Bus Loading
        2. 9.2.2.2 Stub Length
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 12.1 Tape and Reel Information

9.1 Application Information

The ISOW308x devices are designed for bidirectional data transfer on multipoint RS-485 networks. An RS-485 bus has multiple transceivers that connect in parallel to a bus cable. Both cable ends are terminated with a termination resistor, RT, to remove line reflections. The value of RT matches the characteristic impedance, Z0, of the cable. This method, known as parallel termination, lets higher data rates be used over a longer cable length.

Full-duplex implementation requires two signal pairs (four wires). Full-duplex implementation lets each node to transmit data on one pair while simultaneously receiving data on the other pair.

Driver outputs Y and Z are shorted to A and B respectively. This reduces overall cabling requirements. Also DE/RE are shorted to each other, and at a time, any node acts as either a driver or a receiver. Split termination in this configuration helps to boost network immunity in noisy environments by providing common-mode noise filtering and also reduces radiated emissions by providing low impedance path to earth to the bus common mode excursions.