SLOS879C April   2014  – June 2025 DRV2625

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Setup for Graphs
      1. 6.1.1 Default Test Conditions
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Support for ERM and LRA Actuators
      2. 7.3.2  Smart-Loop Architecture
        1. 7.3.2.1 Auto-Resonance Engine for LRA
        2. 7.3.2.2 Real-Time Resonance-Frequency Reporting for LRA
        3. 7.3.2.3 Automatic Switch to Open-Loop for LRA
        4. 7.3.2.4 Automatic Overdrive and Braking
          1. 7.3.2.4.1 Startup Boost
          2. 7.3.2.4.2 Brake Factor
        5. 7.3.2.5 Automatic Level Calibration
          1. 7.3.2.5.1 Automatic Compensation for Resistive Losses
          2. 7.3.2.5.2 Automatic Back-EMF Normalization
          3. 7.3.2.5.3 Calibration Time Adjustment
          4. 7.3.2.5.4 Loop-Gain Control
          5. 7.3.2.5.5 Back-EMF Gain Control
        6. 7.3.2.6 Actuator Diagnostics
        7. 7.3.2.7 Automatic Re-Synchronization
      3. 7.3.3  Open-Loop Operation
        1. 7.3.3.1 Waveform Shape Selection for LRA
        2. 7.3.3.2 Automatic Braking in Open Loop
      4. 7.3.4  Flexible Front-End Interface
        1. 7.3.4.1 Internal Memory Interface
          1. 7.3.4.1.1 Library Parameterization
          2. 7.3.4.1.2 Playback Interval
          3. 7.3.4.1.3 Waveform Sequencer
        2. 7.3.4.2 Real-Time Playback (RTP) Interface
        3. 7.3.4.3 Process Trigger
      5. 7.3.5  Noise Gate Control
      6. 7.3.6  Edge Rate Control
      7. 7.3.7  Constant Vibration Strength
      8. 7.3.8  Battery Voltage Reporting
      9. 7.3.9  Ultra Low-Power Shutdown
      10. 7.3.10 Automatic Go-To-Stand-by (Low Power)
      11. 7.3.11 I2C Watchdog Timer
      12. 7.3.12 Device Protection
        1. 7.3.12.1 Thermal Sensor
        2. 7.3.12.2 Over-Current Protection
        3. 7.3.12.3 VDD UVLO Protection
        4. 7.3.12.4 Brownout Protection
      13. 7.3.13 POR
      14. 7.3.14 Silicon Revision Control
      15. 7.3.15 Support for LRA and ERM Actuators
      16. 7.3.16 Multi-Purpose Pin Functionality
        1. 7.3.16.1 Trigger-Pulse Functionality
        2. 7.3.16.2 Trigger-Level (Enable) Functionality
        3. 7.3.16.3 Interrupt Functionality
      17. 7.3.17 Automatic Transition to Standby State
      18. 7.3.18 Automatic Brake into Standby
      19. 7.3.19 Battery Monitoring and Power Preservation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power States
      2. 7.4.2 Operation With VDD < 2.5 V (Minimum VDD)
      3. 7.4.3 Operation With VDD > 6 V (Absolute Maximum VDD)
      4. 7.4.4 Operation in Shutdown State
      5. 7.4.5 Operation in STANDBY State
      6. 7.4.6 Operation in ACTIVE State
      7. 7.4.7 Changing Modes of Operation
    5. 7.5 Operation During Exceptional Conditions
      1. 7.5.1 Operation With No Actuator Attached
      2. 7.5.2 Operation With a Non-Moving Actuator Attached
      3. 7.5.3 Operation With a Short at REG Pin
      4. 7.5.4 Operation With a Short at OUT+, OUT–, or Both
    6. 7.6 Programming
      1. 7.6.1  Auto-Resonance Engine Programming for the LRA
        1. 7.6.1.1 Drive-Time Programming
        2. 7.6.1.2 Current-Dissipation Time Programming
        3. 7.6.1.3 Blanking Time Programming
        4. 7.6.1.4 Zero-Crossing Detect-Time Programming
      2. 7.6.2  Automatic-Level Calibration Programming
        1. 7.6.2.1 Rated Voltage Programming
        2. 7.6.2.2 Overdrive Voltage-Clamp Programming
      3. 7.6.3  I2C Interface
        1. 7.6.3.1 TI Haptic Broadcast Mode
        2. 7.6.3.2 I2C Communication Availability
        3. 7.6.3.3 General I2C Operation
        4. 7.6.3.4 Single-Byte and Multiple-Byte Transfers
        5. 7.6.3.5 Single-Byte Write
        6. 7.6.3.6 Multiple-Byte Write and Incremental Multiple-Byte Write
        7. 7.6.3.7 Single-Byte Read
        8. 7.6.3.8 Multiple-Byte Read
      4. 7.6.4  Programming for Open-Loop Operation
        1. 7.6.4.1 Programming for ERM Open-Loop Operation
        2. 7.6.4.2 Programming for LRA Open-Loop Operation
      5. 7.6.5  Programming for Closed-Loop Operation
      6. 7.6.6  Diagnostics Routine
      7. 7.6.7  Calibration Routine
      8. 7.6.8  Waveform Playback Programming
        1. 7.6.8.1 Data Formats for Waveform Playback
        2. 7.6.8.2 Open-Loop Mode
        3. 7.6.8.3 Closed-Loop Mode
      9. 7.6.9  Waveform Setup and Playback
        1. 7.6.9.1 Waveform Playback Using RTP Mode
        2. 7.6.9.2 Waveform Sequencer
        3. 7.6.9.3 Waveform Playback Triggers
          1. 7.6.9.3.1 Playback Trigger Without Automatic Brake into Standby
            1. 7.6.9.3.1.1 Playback Trigger With Automatic Brake into Standby (SimpleDrive)
      10. 7.6.10 117
  9. 8 Register Map
    1. 8.1  Address: 0x00
    2. 8.2  Address: 0x01
    3. 8.3  Address: 0x02
    4. 8.4  Address: 0x03
    5. 8.5  Address: 0x04
    6. 8.6  Address: 0x05
    7. 8.7  Address: 0x06
    8. 8.8  Address: 0x07
    9. 8.9  Address: 0x08
    10. 8.10 Address: 0x09
    11. 8.11 Address: 0x0A
    12. 8.12 Address: 0x0B
    13. 8.13 Address: 0x0C
    14. 8.14 Address: 0x0D
    15. 8.15 Address: 0x0E
    16. 8.16 Address: 0x0F
    17. 8.17 Address: 0x10
    18. 8.18 Address: 0x11
    19. 8.19 Address: 0x12
    20. 8.20 Address: 0x13
    21. 8.21 Address: 0x14
    22. 8.22 Address: 0x15
    23. 8.23 Address: 0x16
    24. 8.24 Address: 0x17
    25. 8.25 Address: 0x18
    26. 8.26 Address: 0x19
    27. 8.27 Address: 0x1A
    28. 8.28 Address: 0x1B
    29. 8.29 Address: 0x1C
    30. 8.30 Address: 0x1D
    31. 8.31 Address: 0x1F
    32. 8.32 Address: 0x20
    33. 8.33 Address: 0x21
    34. 8.34 Address: 0x22
    35. 8.35 Address: 0x23
    36. 8.36 Address: 0x24
    37. 8.37 Address: 0x25
    38. 8.38 Address: 0x26
    39. 8.39 Address: 0x27
    40. 8.40 Address: 0x28
    41. 8.41 Address: 0x29
    42. 8.42 Address: 0x2A
    43. 8.43 Address: 0x2C
    44. 8.44 Address: 0x2E
    45. 8.45 Address: 0x2F
    46. 8.46 Address: 0x30
  10.   Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Actuator Selection
          1. 9.2.2.1.1 Eccentric Rotating-Mass Motors (ERM)
          2. 9.2.2.1.2 Linear Resonance Actuators (LRA)
            1. 9.2.2.1.2.1 Auto-Resonance Engine for LRA
        2. 9.2.2.2 Capacitor Selection
        3. 9.2.2.3 Interface Selection
        4. 9.2.2.4 Power Supply Selection
      3. 9.2.3 Application Curves
    3. 9.3 Initialization Set Up
      1. 9.3.1 Initialization Procedure
      2. 9.3.2 Typical Usage Examples
        1. 9.3.2.1 Play a Waveform or Waveform Sequence from the ROM Waveform Memory
        2. 9.3.2.2 Play a Real-Time Playback (RTP) Waveform
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Examples
  11. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Waveform Library Effects List
    2. 9.2 Trademarks
  12. 10Revision History
  13.   Mechanical, Packaging, and Orderable Information

8 Register Map

Table 8-1 Register Map Overview
REG NO. DEFAULT BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0x00 0x13 CHIPID[3:0] REV[3:0]
0x01 0x00 DIAG_RESULT Reserved PROCESS_DONE UVLO OVER_TEMP OC_DETECT
0x02 0x18 Reserved INTZ_MASK[3:0]
0x03 0x00 DIAG_Z_RESULT[7:0]
0x04 0x00 VBAT[7:0]
0x05 0x00 Reserved LRA_PERIOD[9:8]
0x06 0x00 LRA_PERIOD[7:0]
0x07 0x44 I2C_BCAST_EN LRA_PERIOD_AVG_DIS LINEREG_COMP_SEL[1:0] TRIG_PIN_FUNC[1:0] MODE[1:0]
0x08 0x88 LRA_ERM CONTROL_LOOP HYBRID_LOOP AUTO_BRK_OL AUTO_BRK_INTO_STBY INPUT_SLOPE_CHECK Reserved
0x09 0x00 BAT_LIFE_EXT_LVL_EN[1:0] Reserved UVLO_THRES[2:0]
0x0A 0x92 BAT_LIFE_EXT_LVL1[7:0]
0x0B 0x8D BAT_LIFE_EXT_LVL2[7:0]
0x0C 0x00 Reserved GO
0x0D 0x00 LIB_ENABLE LIB_SEL PLAYBACK_INTERVAL Reserved DIG_MEM_GAIN[1:0]
0x0E 0x7F RTP_INPUT[7:0]
0x0F 0x01 WAIT1 WAV_FRM_SEQ1[6:0]
0x10 0x00 WAIT2 WAV_FRM_SEQ2[6:0]
0x11 0x00 WAIT3 WAV_FRM_SEQ3[6:0]
0x12 0x00 WAIT4 WAV_FRM_SEQ4[6:0]
0x13 0x00 WAIT5 WAV_FRM_SEQ5[6:0]
0x14 0x00 WAIT6 WAV_FRM_SEQ6[6:0]
0x15 0x00 WAIT7 WAV_FRM_SEQ7[6:0]
0x16 0x00 WAIT8 WAV_FRM_SEQ8[6:0]
0x17 0x00 WAV4_SEQ_LOOP[1:0] WAV3_SEQ_LOOP[1:0] WAV2_SEQ_LOOP[1:0] WAV1_SEQ_LOOP[1:0]
0x18 0x00 WAV8_SEQ_LOOP[1:0] WAV7_SEQ_LOOP[1:0] WAV6_SEQ_LOOP[1:0] WAV5_SEQ_LOOP[1:0]
0x19 0x00 Reserved WAV_SEQ_MAIN_LOOP[2:0]
0x1A 0x00 ODT[7:0]
0x1B 0x00 SPT[7:0]
0x1C 0x00 SNT[7:0]
0x1D 0x00 BRT[7:0]
0x1F 0x3F RATED_VOLTAGE[7:0]
0x20 0x89 OD_CLAMP[7:0]
0x21 0x0D A_CAL_COMP[7:0]
0x22 0x6D A_CAL_BEMF[7:0]
0x23 0x36 NG_THRESH FB_BRAKE_FACTOR[2:0] LOOP_GAIN[1:0] BEMF_GAIN[1:0]
0x24 0x64 RATED_VOLTAGE_CLAMP[7:0]
0x25 0x80 OD_CLAMP_LVL1[7:0]
0x26 0x00 OD_CLAMP_LVL2[7:0]
0x27 0x10 LRA_MIN_FREQ_SEL LRA_RESYNC_FORMAT Reserved DRIVE_TIME[4:0]
0x28 0x11 BLANKING_TIME[3:0] IDISS_TIME[3:0]
0x29 0x0C Reserved OD_CLAMP_TIME[1:0] SAMPLE_TIME[1:0] ZC_DET_TIME[1:0]
0x2A 0x02 Reserved AUTO_CAL_TIME[1:0]
0x2C 0x00 LRA_AUTO_OPEN_LOOP AUTO_OL_CNT[1:0] Reserved LRA_WAVE_SHAPE
0x2E 0x00 Reserved OL_LRA_PERIOD[9:0]
0x2F 0xC6 OL_LRA_PERIOD[9:0]
0x30 0x00 CURRENT_K[7:0]