SLOSEA9 December 2025 TRF2001P
PRODUCTION DATA
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| ANT | 17 | I/O | Antenna port. |
| CEN | 1 | D | Chip enable digital control logic. |
| CIB | 7 | D | Internal bias digital control logic. |
| CTR | 8 | D | Transmit and receive path select digital control logic. |
| GND | 2, 4, 6, 9, 11, 14, 15, 16, 18, 19, 20, 21, 22, 23, 24, 27 | – | RF ground. |
| LNA_IN | 10 | I | LNA input. Short to RX_FLT if a receive filter is not required. |
| PA_IN | 5 | I | PA input. |
| RX_FLT | 12 | O | Receive signal from ANT pin. Typically RX filter connected between RX_FLT and LNA_IN. |
| LNA_OUT | 3 | O | LNA output. |
| VCC | 28 | P | LNA and digital control logic supply voltage. |
| VCC_PA | 25, 26 | P | PA supply voltage. |
| VDET | 13 | O | Power detector voltage output. |
| Thermal Pad | Pad | – | Thermal pad and serves as ground reference. Connect to heat-dissipating ground plane on the board. |