SLOSEA9 December   2025 TRF2001P

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Digital Mode Control Logic
    8. 5.8 Typical Characteristics - Transmit
    9. 5.9 Typical Characteristics - Receive
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 TRF2001P as Range Extender
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Electrical Characteristics

at TA = 25°C, VCC_PA = 3.3V, VCC = 3.3V, f = 915MHz, RX_FLT shorted to LNA_IN, RF transmit specification from PA_IN to ANT pin, RF receive specifications from ANT to LNA_OUT pin, 50Ω source and load at input and output RF pins respectively, measured on EVM and de-embedded up to the device pins (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RF TRANSMIT
Frequency range 820 1054 MHz
Transmit small signal gain PIN = –25dBm f = 867MHz 25 dB
f = 902MHz to 928MHz 24
PSAT Saturated output power f = 867MHz 27.2 dBm
f = 902MHz 27.5
f = 915MHz, 928MHz 27.4
VCC_PA = 3.6V,
VCC = 3.6V
f = 867MHz 28.1
f = 902MHz 28.4
f = 915MHz, 928MHz 28.3
OP1dB Output 1-dB compression point f = 867MHz 25.4 dBm
f = 902MHz 26.2
f = 915MHz 26.0
f = 928MHz 25.2
VCC_PA = 3.6V,
VCC = 3.6V
f = 867MHz 25.7
f = 902MHz 26.4
f = 915MHz 26.6
f = 928MHz 26.4
PAE Power added efficiency PO = 27dBm f = 867MHz 43.2%
f = 902MHz 42.2%
f = 915MHz 42.0%
f = 928MHz 41.7%
Harmonic distortion(1) f = 867MHz,
PO = 27dBm
2nd harmonic −59.5 dBc
3rd harmonic −67.5
f = 928MHz,
PO = 27dBm
2nd harmonic −56.0
3rd harmonic −72.0
Input return loss at PA_IN PIN = –27dBm 14.5 dB
Maximum input power at PA_IN f = 867MHz VSWR = 1:1 15 dBm
VSWR = 2:1 15
VSWR = 4:1 6
f = 928MHz VSWR = 1:1 15
VSWR = 2:1 10
VSWR = 4:1 5.5
Survivability CW, PO into 50Ω load, VSWR = 10:1, without permanent damage 27 dBm
POWER DETECTOR
Power detector power range Power at ANT pin, f = 820MHz to 1054MHz 5 PSAT dBm
VDET Power detector voltage range 0 1.8 V
RF RECEIVE
Frequency range 820 1054 MHz
Receive small signal gain PIN = –27dBm, f = 867MHz to 928MHz 16 dB
NF Noise figure f = 867MHz 3.0 dB
f = 915MHz 3.2
LNA_IN to LNA_OUT,
f = 867MHz to 928MHz
1.3

ANT to RX_FLT insertion loss PIN = –27dBm 1.5 dB
IIP3 Input 3rd order compression point PIN = –27dBm f = 867MHz –5.2 dBm
f = 902MHz to 928MHz

–6.0
IP1dB Input 1dB compression point f = 867MHz −7.6 dBm
f = 902MHz to 928MHz

−6.7
Input return loss at ANT PIN = –27dBm f = 867MHz 16 dB
f = 915MHz 12 dB
Output return loss at LNA_OUT PIN = –27dBm f = 867MHz 18 dB
f = 915MHz 16 dB
DC SPECIFICATIONS
ICC_PA VCC_PA supply current TX mode PO = 27dBm 318 mA
PO = 24dBm 228
No RF 58
RX mode, PIN = –27dBm 0.3
ICC VCC supply current TX mode PO = 27dBm 42 mA
PO = 24dBm 20
No RF 7
RX mode, PIN = –27dBm 10
Powerdown supply current(2) No RF 0.05 1 µA
DIGITAL CONTROL LOGIC SPECIFICATIONS
VIH High voltage threshold With respect to GND High (logic 1) 1.6 3.3 3.45 V
VIL Low voltage threshold Low (logic 0) 0 0.5 V
IIH Pin-high input current Pin voltage = 3.3V 1 µA
IIL Pin-low input current Pin voltage = 0V 1 µA
No external filter on ANT pin. Refer to Figure 5-4 for higher order harmonic performance.
Sum of currents into the VCC_PA and VCC pins.