SLUP414 April   2024

 

  1.   1
  2.   Abstract
  3. Introduction
  4. PSFB Operational Principles
  5. PSFB Output Rectifiers
  6. Clamping Options for a PSFB
  7. PSFB Control
  8. Synchronous Rectifier Modes of Operation
  9. Light-Load Management Options
  10. PSFB Design Example
  11. Conclusions
  12. 10Additional Resources

Light-Load Management Options

At light loads, it may be necessary to use a specialized control mode in order to maintain the output voltage within regulation or to improve the efficiency of the PSFB converter. One such method is to directly reduce the switching frequency of the converter and extend the periods of OUT1H/OUT2H and OUT1L/OUT2L overlap, as shown in Figure 37. This method enables the PSFB to achieve lower Deff while maintaining a minimum overlap time for each OUT1H/OUT2L and OUT1L/OUT2H diagonal pair. Given the longer on-time of each primary gate signal, we do not recommend this method when using a gate-drive transformer on the primary side, as it becomes challenging to avoid saturating it.

Figure 38 illustrates a second light-load management scheme. In this method, the PSFB converter stops switching entirely if the output of the error amplifier, VCOMP, falls below a preset value, Vburst_threshold. When VCOMP becomes larger than Vburst_threshold, the PSFB resumes switching. One of the benefits of this hysteretic burst-mode approach compared to frequency-reduction mode is lower CPU utilization, since the controller does not need to compute the required switching frequency. Hysteretic burst mode also has a higher loop bandwidth at light loads compared to frequency-reduction mode. The primary disadvantage of this approach is a higher output-voltage ripple.

GUID-20240203-SS0I-PG7D-RX8J-ZBX6P1M6DDZ0-low.svg Figure 37 PSFB switching pattern with frequency-reduction mode.
GUID-20240203-SS0I-CLKQ-WC5H-XGSQ8HVHVZHH-low.svg Figure 38 PSFB switching pattern with hysteretic burst mode.