The charger operates in non-synchronous mode when the sensed charge current is below the ISYNSET value. Otherwise, the charger operates in synchronous mode.

During synchronous mode, the low-side N-channel power MOSFET is on when the high-side N-channel power MOSFET is off. The internal gate-drive logic uses break-before-make switching to prevent shoot-through currents. During the 30-ns dead time where both FETs are off, the back-diode of the low-side power MOSFET conducts the inductor current. Having the low-side FET turn-on keeps the power dissipation low, and allows safe charging at high currents. During synchronous mode, the inductor current always flows, and the device operates in Continuous Conduction Mode (CCM), creating a fixed two-pole system.

During non-synchronous operation, after the high-side n-channel power MOSFET turns off, and after the break-before-make dead-time, the low-side n-channel power MOSFET turns on for approximately 80 ns, then the low-side power MOSFET turns off and stays off until the beginning of the next cycle, when the high-side power MOSFET is turned on again. The 80-ns low-side MOSFET on-time is required to ensure that the bootstrap capacitor is always recharged and able to keep the high-side power MOSFET on during the next cycle. This is important for battery chargers, where unlike regular dc-dc converters, there is a battery load that maintains a voltage and can both source and sink current. The 80-ns low-side pulse pulls the PH node (connection between high and low-side MOSFET) down, allowing the bootstrap capacitor to recharge up to the REGN LDO value. After the 80 ns, the low-side MOSFET is kept off to prevent negative inductor current from flowing. The inductor current is blocked by the turned-off low-side MOSFET, and the inductor current becomes discontinuous. This mode is called Discontinuous Conduction Mode (DCM).

During the DCM mode, the loop response automatically changes and has a single-pole system at which the pole is proportional to the load current, because the converter does not sink current, and only the load provides a current sink. This means that at very low currents, the loop response is slower, because there is less sinking current available to discharge the output voltage. At very low currents during non-synchronous operation, there may be a small amount of negative inductor current during the 80-ns recharge pulse. The charge should be low enough to be absorbed by the input capacitance.

Whenever BTST – PH < 4 V, the 80-ns recharge pulse occurs on LODRV, the high-side MOSFET does not turn on, and the low-side MOSFET does not turn on (only 80-ns recharge pulse).

In the bq24751A, V_ISYNSET=I_SYN×R_SR is internally set to 13mV as the charge-current threshold at which the charger changes from non-synchronous operation to synchronous operation. The low-side driver turns on for only 80 ns to charge the boost capacitor. This is important to prevent negative inductor current, which may cause a boost effect in which the input voltage increases as power is transferred from the battery to the input capacitors. This boost effect can lead to an over-voltage on the PVCC node and potentially damage the system. The inductor ripple current is given by

Equation 4.

where:

I_{RIPPLE_MAX} Happens when the duty-cycle(D) is mostly near to 0.5 at given V_IN, f_s, and L.

The ISYNSET comparator, or charge undercurrent comparator, compares the voltage between SRP-SRN and internal threshold. The threshold is set to 13 mV on the falling edge, with an 8-mV hysteresis on the rising edge with a 10% variation.