SLUS756D September 2007 – June 2026 BQ24751A
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Functional Block Diagram
- 6.2 Battery Voltage Regulation
- 6.3 Battery Current Regulation
- 6.4 Input Adapter Current Regulation
- 6.5 Adapter Detect and Power Up
- 6.6 Enable and Disable Charging
- 6.7 System Power Selector
- 6.8 Battery Learn Cycles
- 6.9 Automatic Internal Soft-Start Charger Current
- 6.10 Converter Operation
- 6.11 Synchronous and Non-Synchronous Operation
- 6.12 High Accuracy IADAPT Using Current Sense Amplifier (CSA)
- 6.13 Input Overvoltage Protection (ACOV)
- 6.14 Input Undervoltage Lock Out (UVLO)
- 6.15 Battery Overvoltage Protection
- 6.16 Battery Shorted (Battery Undervoltage) Protection
- 6.17 Charge Overcurrent Protection
- 6.18 Thermal Shutdown Protection
- 6.19 Adapter Detected Status Register ( ACGOOD Pin)
- 6.20 Input Over-Power Protection (ACOP)
- 7 Application Information
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
5.5 Typical Charateristics
Table 5-1 Table of Graphs
| Y(1) | X | FIgure |
|---|---|---|
| VREF Load and Line Regulation | vs Load Current | Figure 5-1 |
| REGN Load and Line Regulation | vs Load Current | Figure 5-2 |
| BAT Voltage | vs VADJ/VDAC Ratio | Figure 5-3 |
| Charge Current | vs SRSET/VDAC Ratio | Figure 5-4 |
| Input Current | vs ACSET/VDAC Ratio | Figure 5-5 |
| BAT Voltage Regulation Accuracy | vs Charge Current | Figure 5-6 |
| BAT Voltage Regulation Accuracy | Figure 5-7 | |
| Charge Current Regulation Accuracy | Figure 5-8 | |
| Input Current Regulation (DPM) Accuracy | Figure 5-9 | |
| VIADAPT Input Current Sense Amplifier Accuracy | Figure 5-10 | |
| Input Regulation Current (DPM), and Charge Current | vs System Current | Figure 5-11 |
| Transient System Load (DPM) Response | Figure 5-12 | |
| Charge Current Regulation | vs BAT Voltage | Figure 5-13 |
| Efficiency | vs Battery Charge Current | Figure 5-14 |
| Battery Removal (from Constant Current Mode) | Figure 5-15 | |
| ACDRV and BATDRV Startup | Figure 5-16 | |
| REF and REGN Startup | Figure 5-17 | |
| System Selector on Adapter Insertion with 390-μF SYS-to-PGND System Capacitor | Figure 5-18 | |
| System Selector on Adapter Removal with 390-μF SYS-to-PGND System Capacitor | Figure 5-19 | |
| System Selector LEARN Turn-On with 390-μF SYS-to-PGND System Capacitor | Figure 5-20 | |
| System Selector LEARN Turn-Off with 390-μF SYS-to-PGND System Capacitor | Figure 5-21 | |
| System Selector on Adapter Insertion | Figure 5-22 | |
| Selector Gate Drive Voltages, 700 ms delay after ACDET | Figure 5-23 | |
| Charger on/Adapter Removal | Figure 5-24 | |
| Charge Enable / Disable and Current Soft-Start | Figure 5-25 | |
| Nonsynchronous to Synchronous Transition | Figure 5-26 | |
| Synchronous to Nonsynchronous Transition | Figure 5-27 | |
| Near 100% Duty Cycle Bootstrap Recharge Pulse | Figure 5-28 | |
| Battery Shorted Charger Response, Over Current Protection (OCP) and Charge Current Regulation | Figure 5-29 | |
| Continuous Conduction Mode (CCM) Switching Waveforms | Figure 5-30 | |
| Discontinuous Conduction Mode (DCM) Switching Waveforms | Figure 5-31 | |
(1) Test results based on Typical System Schematic,
Voltage and Current Programmed by Resistor application schematic. VIN = 20 V, VBAT = 3-cell LiIon,
ICHG = 3 A, IADAPTER_LIMIT = 4 A,
TA = 25°C, unless otherwise specified.
TA = 25°C, unless otherwise specified.
Figure 5-1 VREF LOAD AND LINE
REGULATION vs Load Current
Figure 5-3 BAT VOLTAGE vs VADJ/VDAC
RATIO
Figure 5-5 INPUT CURRENT vs
ACSET/VDAC RATIO
Figure 5-7 BAT VOLTAGE REGULATION
ACCURACY
Figure 5-9 INPUT CURRENT REGULATION
(DPM) ACCURACY
Figure 5-11 INPUT REGULATION CURRENT
(DPM), AND CHARGE CURRENT vs SYSTEM CURRENT
Figure 5-13 CHARGE CURRENT REGULATION
vs BAT VOLTAGE
Figure 5-15 BATTERY REMOVAL
Figure 5-17 REF AND REGN
STARTUP
Figure 5-19 SYSTEM SELECTOR ON ADAPTER
REMOVAL WITH 390 μF SYS-TO-PGND SYSTEM CAPACITOR
Figure 5-21 SYSTEM SELECTOR LEARN
TURN-OFF WITH 390 μF SYS-TO-PGND SYSTEM CAPACITOR
Figure 5-23 SELECTOR GATE DRIVE
VOLTAGES, 700 MS DELAY AFTER ACDET
Figure 5-25 CHARGE ENABLE / DISABLE
AND CURRENT SOFT-START
Figure 5-27 SYNCHRONOUS TO
NONSYNCHRONOUS TRANSITION
Figure 5-29 BATTERY SHORTED CHARGER
RESPONSE, OVERCURRENT PROTECTION (OCP) AND CHARGE CURRENT REGULATION
Figure 5-31 DISCONTINUOUS CONDUCTION
MODE (DCM) SWITCHING WAVEFORMS
Figure 5-2 REGN LOAD AND LINE
REGULATION vs LOAD CURRENT
Figure 5-4 CHARGE CURRENT vs
SRSET/VDAC RATIO
Figure 5-6 BAT VOLTAGE REGULATION
ACCURACY vs CHARGE CURRENT
Figure 5-8 CHARGE CURRENT REGULATION
ACCURACY
Figure 5-10 VIADAPT INPUT
CURRENT SENSE AMPLIFIER ACCURACY
Figure 5-12 TRANSIENT SYSTEM LOAD
(DPM) RESPONSE
Figure 5-14 EFFICIENCY vs BATTERY
CHARGE CURRENT
Figure 5-16 ACDRV
AND BATDRV STARTUP
Figure 5-18 SYSTEM SELECTOR ON ADAPTER
INSERTION WITH 390 μF SYS-TO-PGND SYSTEM CAPACITOR
Figure 5-20 SYSTEM SELECTOR LEARN
TURN-ON WITH 390 μF SYS-TO-PGND SYSTEM CAPACITOR
Figure 5-22 SYSTEM SELECTOR ON ADAPTER
INSERTION
Figure 5-24 CHARGER ON/ADAPTER
REMOVAL
Figure 5-26 NONSYNCHRONOUS TO
SYNCHRONOUS TRANSITION
Figure 5-28 NEAR 100% DUTY CYCLE
BOOTSTRAP RECHARGE PULSE
Figure 5-30 CONTINUOUS CONDUCTION MODE
(CCM) SWITCHING WAVEFORMS