SLUUBT4B June   2018  – June 2025 BQ40Z80

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Ordering Information
    4. 1.4 BQ40Z80 and BQ771807 Circuit Module Performance Specification Summary
  6. 2Hardware
    1. 2.1 BQ40Z80EVM Quick Start Guide
      1. 2.1.1 Items Needed for EVM Setup and Evaluation
      2. 2.1.2 Software Installation
      3. 2.1.3 EVM Connections
      4. 2.1.4 Update Firmware
    2. 2.2 Battery Management Studio
      1. 2.2.1 Registers Screen
      2. 2.2.2 Setting Programmable bq40z80 Options
      3. 2.2.3 Calibration Screen
        1. 2.2.3.1 Voltage Calibration
        2. 2.2.3.2 Temperature Calibration
        3. 2.2.3.3 Current Calibration
      4. 2.2.4 Chemistry Screen
      5. 2.2.5 Firmware Screen
        1. 2.2.5.1 Programming the Flash Memory
        2. 2.2.5.2 Exporting the Flash Memory
      6. 2.2.6 Advanced Comm SMB Screen
  7. 3Hardware Design Files
    1. 3.1 bq40z80EVM Circuit Module Schematic
      1. 3.1.1 Precharge
      2. 3.1.2 Predischarge
      3. 3.1.3 LED Control
      4. 3.1.4 Emergency Shutdown
      5. 3.1.5 Testing Fuse-Blowing Circuit
    2. 3.2 Circuit Module Physical Layouts
      1. 3.2.1 Board Layout
      2. 3.2.2 bq40z80RevA Schematic
    3. 3.3 bq40z80EVM Bill of Materials
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Related Documentation from Texas Instruments
  10. 6Revision History

bq40z80EVM Circuit Module Schematic

This section contains information on modifying the EVM and using various features on the reference design. The jumpers on the board allow different pin configurations. The pin configuration in the registers must match the jumper configuration on the bq40z80EVM . The Pin Configuration register can be set in the Data Memory section of bqStudio. If a register is set to an undefined setting, the output is configured as high-Z.

General Description Pin Configuration Register Setting Jumper Connections Comments
Pack connector with SYS_PRES J1 Connect PACK+ and PACK– to the appropriate pins on the battery pack
Header for cell connections J12 Pin 1: 7P, Pin2: 6P, Pin3: 5P, Pin4: 4P, Pin5: 3P, Pin6: 2P, Pin7: 1P, Pin8: 1N(GND). If using less than 7 cells, tie the unused cell pins (6P, 5P, etc) to the highest cell in the stack
Pin 12 V7SENSE [MFP12_SEL2:MFP12_SEL0]=000 DEFAULT J20[1,2], J7[1,2] Connects Pin 12 as V7SENSE to the middle of the voltage divider
TS3 [MFP12_SEL2:MFP12_SEL0]=001 J20[2,3] Connects Pin 12 as TS3 to a 10k NTC
ADCIN1 [MFP12_SEL2:MFP12_SEL0]=010 J20[1,2], J7[2,3] Connects Pin 12 to Pin 1 of J11. Connect a voltage between 0V and 1V to have the ADC read the voltage at this pin
GPIO [MFP12_SEL2:MFP12_SEL0]=011 J20[1,2], J7[2,3] Connects Pin 12 to Pin 1 of J11. Use this pin as a GPIO
Pin 13 /DISP [MFP13_SEL2:MFP13_SEL0]=000 DEFAULT J21[1,2], J14[1,2] Connects Pin 13 (/DISP) to TP5 and S3
TS4 [MFP13_SEL2:MFP13_SEL0]=001 J21[2,3] Connects Pin 12 as TS4 to a 10k NTC
ADCIN2 [MFP13_SEL2:MFP13_SEL0]=010 J21[1,2], J14[2,3] Connects Pin 13 to Pin 5 of J11. Connect a voltage between 0V and 1V to have the ADC read the voltage at this pin
GPIO [MFP13_SEL2:MFP13_SEL0]=011 J21[1,2], J14[2,3] Connects Pin 13 to Pin 5 of J11. Use this pin as a GPIO
Pin 15 VC7EN [MFP15_SEL1:MFP15_SEL0]=00 DEFAULT J6[1,2] Connects Pin 15 (VC7EN) to the gate of Q6 to enable the voltage divider so a scaled voltage of the top of stack is applied to VC7SENSE
/DISP [MFP15_SEL1:MFP15_SEL0]=01 J6[2,3], J8[1,2] Connects Pin 15 (/DISP) to TP5 and S3
GPIO [MFP15_SEL1:MFP15_SEL0]=10 J6[2, 3], J8[2, 3] Connects Pin 15 (GPIO) to Pin 2 of J11
Pin 16 CB7EN [MFP16_SEL1:MFP16_SEL0]=00 DEFAULT J10[1,2] Connects Pin 17 (CB7EN) to the gate of Q11 for external cell balancing for the 7th cell
PDSG [MFP16_SEL1:MFP16_SEL0]=01 J10[2, 3], J9[1,2] Connects Pin 16 (PDSG) to the gate of Q7 to enable pre-discharge through Q5
GPIO [MFP16_SEL1:MFP16_SEL0]=10 J10[2,3], J9[2,3] Connects Pin 62 to Pin 4 of J11. Use this pin as a GPIO
Pin 17 /PRES [MFP17_SEL2:MFP17_SEL0]=000 DEFAULT J5[1,2] Connects Pin 17 (/PRES) to Pin 3 of J2
SHUTDN [MFP17_SEL2:MFP17_SEL0]=001 J5[1,2] Connects Pin 17 (/SHUTDN) to S3 pushbutton
/DISP [MFP17_SEL2:MFP17_SEL0]=010 J5[2,3], J3[1,2] Connects Pin 17 (/DISP) to TP5 and S2
PDSG [MFP17_SEL2:MFP17_SEL0]=011 J5[2,3], J3[2, 3], J4[1,2] Connects Pin 17 (PDSG) to the gate of Q7 to enable pre-discharge through Q5
GPIO [MFP17_SEL2:MFP17_SEL0]=100 J5[2,3], J3[2,3], J4[2,3] Connects Pin 17 (GPIO) to Pin 3 of J11
Pin 20 LEDCNTLA [MFP20_SEL2:MFP20_SEL0]=000 DEFAULT J15[2,3] Connects pin 20 to LEDs to be used as LEDCNTLA. Must be used with LEDCNTLB and LEDCNTLC
PDSG [MFP20_SEL2:MFP20_SEL0]=010 J15[1,2], J13[1,2] Connects pin 20 (PDSG) to the gate of Q7 to enable pre-discharge through Q5. In this mode, Pins 21 and Pin 22 are used as GPIOs.
GPIO [MFP20_SEL2:MFP20_SEL0]=001 J15[1,2], J13[2,3] Connects Pin 20 to Pin 6 of J11. Use this pin as a GPIO
Pin 21 LEDCNTLB [MFP20_SEL2:MFP20_SEL0]=000 DEFAULT J17[1,2] Connects pin 21 to LEDs to be used as LEDCNTLB. Must be used with LEDCNTLA and LEDCNTLC
GPIO [MFP20_SEL2:MFP20_SEL0]=010 or [MFP20_SEL2:MFP20_SEL0]=001 J17[2,3] Connects Pin 21 to Pin 7 of J11. Use this pin as a GPIO
Pin 22 LEDCNTLC [MFP20_SEL2:MFP20_SEL0]=000 DEFAULT J16[1,2] Connects pin 22 to LEDs to be used as LEDCNTLC. Must be used with LEDCNTLA and LEDCNTLB
GPIO [MFP20_SEL2:MFP20_SEL0]=010 or [MFP20_SEL2:MFP20_SEL0]=001 J16[2,3] Connects Pin 22 to Pin 8 of J11. Use this pin as a GPIO