SLUUC72A September   2020  – October 2021 TPS542A50

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Before You Begin
  3. 2Description
    1. 2.1 Typical End-User Applications
    2. 2.2 EVM Features
    3. 2.3 TPS542A50EVM-059 PCB
  4. 3TPS542A50EVM-059 Bottom Circuit
    1. 3.1 Modifications
      1. 3.1.1 Output Voltage Setpoint
      2. 3.1.2 Enable and Undervoltage Lockout
      3. 3.1.3 Programming and External Clock Synchronization
      4. 3.1.4 Load Step with Function Generator
    2. 3.2 TPS542A50EVM-059 Bottom Circuit Schematic
    3. 3.3 Test Setup and Results
      1. 3.3.1  Input/Output Connections
      2. 3.3.2  Start Up Procedure
      3. 3.3.3  Electrical Performance Specifications and Results
      4. 3.3.4  Efficiency
      5. 3.3.5  Power Loss
      6. 3.3.6  Load Regulation
      7. 3.3.7  Transient Response
      8. 3.3.8  Loop Response
      9. 3.3.9  Output Voltage Ripple
      10. 3.3.10 Thermal Data
  5. 4TPS542A50EVM-059 Top Circuit (Small layout area design)
    1. 4.1 Modifications
      1. 4.1.1 Output Voltage Setpoint
      2. 4.1.2 Enable and Undervoltage Lockout
      3. 4.1.3 Programming and External Clock Synchronization
      4. 4.1.4 Load Step with Function Generator
    2. 4.2 TPS542A50EVM-059 Top Circuit (Small Layout Area) Schematic
    3. 4.3 Test Setup and Results
      1. 4.3.1  Input/Output Connections
      2. 4.3.2  Start Up Procedure
      3. 4.3.3  Electrical Performance Specifications and Results
      4. 4.3.4  Efficiency
      5. 4.3.5  Power Loss
      6. 4.3.6  Load Regulation
      7. 4.3.7  Line Regulation
      8. 4.3.8  Transient Response
      9. 4.3.9  Loop Response
      10. 4.3.10 Output Voltage Ripple
      11. 4.3.11 Start Up
  6. 5TPS542A50EVM-059 PCB Layout
  7. 6List of Materials
  8. 7Revision History

3.3.3 Electrical Performance Specifications and Results

The typical electrical perfomance specifications of the TPS542A50EVM bottom circuit are shown in Table 3-3. Unless stated otherwise, the measurements were taken with the converter operating in FCCM and TAMB = 25°C.

Table 3-3 Bottom Circuit Electrical Performance Specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
VIN voltage range 5 12 14 V
Output voltage 1 V
Output current range 0 15 A
Load regulation VIN = 12 V, IO = 0 A to 15 A, FCCM -0.2

+0.2

 %
ΔVOUT, total undershoot/overshoot VIN = 12 V, IO = 2-A to 12-A to 2-A load step @ 10 A/μs 91 mV
Loop bandwidth VIN = 12 V, IO = 10 A 120 kHz
Phase margin VIN = 12 V, IO = 10 A 65

°
Output voltage ripple VIN = 12 V, IO = 0 A 12.1 mV
VIN = 12 V, IO = 10 A 12.1 mV
IC case temperature VIN = 12 V, IO = 15 A, Tamb = 25C

78.4

°C
Switching frequency FCCM 1000 kHz