SLVAFY5 May 2025 TPS1685 , TPS1689 , TPS25984 , TPS25985
In this application, TPS1685 is considered for parallel operation. When eFuses are operated in a parallel configuration, current balancing among eFuses is a major challenge. A successful parallel operation makes sure of equal current balancing among the parallel-connected devices both under steady-state . Figure 2-1 shows the number of N eFuse devices connected in parallel configuration. The input and the output terminals are connected together.
Conventional stackable eFuses operate independently, each with a predefined trip threshold calculated by dividing the system's total threshold by the number of eFuses as shown in Equation 1. This decentralized approach means each eFuse is unaware of the status or actions of another eFuse.
In a setup, where the eFuses are exactly matched in specifications and the PCB trace resistance in each eFuse path is exactly equal, this design works well and trips exactly at the target system threshold. However, when the eFuses have mismatch in Rdson and the comparator thresholds or reference voltages along with PCB trace resistance mismatch, the eFuses with individual over current threshold can trip at different thresholds. The ones with lower Rds(on), path resistance and threshold trips sooner, even when the total system load current is below the over current threshold. This has an effect of lowering the total system over current threshold, which causes false tripping during normal operation.