To avoid the problem stated in Section 3.1, TI’s eFuse devices use a new method for overcurrent protection. These eFuses devices rely on the total system current instead of individual device current. All the IMON pins are tied together to R_{IMON_eq} to set the total system current as shown in Figure 3-2. This eliminates the problem of lowering of the overcurrent threshold due to mismatches between the devices and paths.

Keeping the system trip threshold higher than the system maximum current avoids unwanted eFuse tripping. However, current distribution through eFuse is unequal as shown in Table 3-2. eFuse_1 continues carrying higher current than the eFuse operating current.

Figure 3-2 eFuse Devices Connected in Parallel with Common Over Current Limit to Support 80A Load Current

To evaluate the performance, load current is increased in steps of 2A as shown in Figure 3-3. Due to mismatch in path resistance, eFuses can be seen carrying unequal current distribution. In Figure 3-3, currents through each eFuses are kept higher so device does not go into ACS.

Figure 3-3 Current Sharing Among Four eFuses Without ACS

Limitations

Unequal Current Sharing Among eFuses

When eFuse devices are operating at the max rated current, unequal current distribution among individual eFuses lead to varying stress levels. With those eFuse devices carrying higher currents face increased thermal and electrical stress. This can cause premature failure, overheating, and degradation, potentially exceeding rated currents in PCB traces or vias. As a result, system reliability is reduced, maintenance costs increase, and potential system downtime occurs, ultimately shortening the PCB's lifespan.