2 Current Limit and Thermal Protection

TI’s smart HSSs include a high-accuracy adjustable current limit feature. Typically, the current limit loop takes a few μs to assert. Within the few μs, the inrush current can exceed the limit, but there is an additional internal fast trip level to limit the current for protection. The current limit pin can be configured in one of three ways (one externally and two internally):

1. Connect the CL pin through a resistor to ground to adjust the current limit within the range for the device. The equation or example on how to calculate this can be found in the Application Information section of every data sheet. Please make sure the resistor and the current limit is chosen within the stated range for the relevant device or else the current limit is considered out of range.
2. Leave the CL pin floating for the CL = open or out of range internal current limit.
3. Connect the CL pin directly to ground for the CL = GND internal current limit.

TI highly recommends that the current limit is set externally using a resistor. The internal limits are designed for fail-safe cases (for example, the external resistor gets damaged), so the device can protect itself and is considered a fault for the device. For methods two and three above, the internal current limits are stated in the Electrical Characteristics table of every data sheet.

Other available HSSs do not include this feature or allow the user to adjust the current limit based on application. Some of TI’s HSSs also allow the user to dynamically change the current limit meaning set an initial limit for inrush control and change to another value during normal operation.

When the overcurrent threshold is reached, the device responds accordingly based on the device. For the 48V HTC devices, the device clamps the current at the current limit until thermal shutdown is reached. There are two types of thermal shutdown: relative, where the power FET temperature (T_FET) is rising much faster than the controller (T_CON), and absolute, where the device reaches the absolute reference temperature (T_ABS). When the device experiences thermal faults regardless of the type, the output turns off as a protective mechanism. Whether or not the device eventually turns back on after the device recovers from the fault depends on the latch pin configuration. If the latch pin is pulled low, then the device operates in auto-retry mode and if the latch pin is pulled high, then the device is in latch-off mode. The following is a short summary of the thermal faults.

• Relative thermal shutdown
  • ΔT = T_FET – T_CON > T_REL

  • T_REL= relative thermal shutdown threshold

  • If latch = low, when t_RETRY time is up, then the device or output tries to start back up again.
  • If latch = high, then the output stays off until the latch or enable pin is toggled.

• Absolute thermal shutdown

  • Device reaches T_ABS

  • If latch = low, T_J < T_ABS – T_hys must be true when the t_RETRY time is up for the device to try to start back up again.

  • T_hys = thermal shutdown hysteresis threshold
  • T_J = junction temperature

  • If latch = high, then the output stays off until the latch or enable pin is toggled.