SLVAG18 April   2025 TPSI3100 , TPSI3100-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Why DESAT Protection Is Needed
    1. 1.1 Key Considerations for DESAT Protection
  5. 2Key DESAT Circuit Components
    1. 2.1 Circuit Startup Behavior
  6. 3Design Example
    1. 3.1 Design Requirements
    2. 3.2 Threshold Equations
    3. 3.3 Given Parameters
    4. 3.4 Inserting Given Parameters into Equations
    5. 3.5 Solving Equations for Unknowns
    6. 3.6 Selecting Resistances to Satisfy Equations
    7. 3.7 Determining Blanking Capacitance
    8. 3.8 Final Component Values
    9. 3.9 Lab Testing
  7. 4Closing

3.7 Determining Blanking Capacitance

Select a CBLK value based on the 10µs maximum delay requirement, starting with the general RC equation. If we use RRESP < 10kΩ, propagation delay time can be as long as 460ns and needs to be accounted for. Use Thevenin/Norton equivalent to determine the equivalent resistance seen by CBLK.

Equation 3. V C = V S × ( 1 - e - t R C )
Equation 4. V R E F + < V D D H × ( 1 - e - ( t M A X D E L A Y - t R E S P ) × ( R L I M + R D I V 1 + R D I V 2 ) ( R L I M + R D I V 1 ) × R D I V 2 × C B L K )
Equation 5. 1.23 < 17 × ( 1 - e - ( 10 μ - 460 n ) × ( 54.9 e 3 + 23.9 e 3 + 11.5 e 3 ) ( 54.9 e 3 + 23.9 e 3 ) × 11.5 e 3 × C B L K )
Equation 6. 0 < C B L K < 12.66 n F