SLVK181 January   2025 DRV8351-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Single-Event Effects (SEE)
  6. 3 Device and Test Board Information
  7. 4 Irradiation Facility and Setup
  8. 5 Depth, Range, and LETEFF Calculation
  9. 6 Test Setup and Procedures
  10. 7 Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB)
  11. 8 Single-Event Transients (SET)
  12. 9 Event Rate Calculations
  13. 10Summary
  14.   A References

5 Depth, Range, and LETEFF Calculation

DRV8351 Generalized Cross-Section Stack on the DRV8351-SEP and Application Used to Determine Ion ParametersFigure 5-1 Generalized Cross-Section Stack on the DRV8351-SEP and Application Used to Determine Ion Parameters

The DRV8351-SEP is fabricated in the TI LBC9 process with 2LM + METDCU back-end-of-line (BEOL) stack. The total stack height from the surface of the passivation to the silicon surface is 8.07μm based on nominal layer thickness as shown in Figure 5-1. Accounting for energy loss through the 1mil thick Aramica beam port window, the 40mm air gap, and the BEOL stack over the DRV8351-SEP, the effective LET (LETEFF) at the surface of the silicon substrate and the depth was determined with the SEUSS 2020 Software (provided by the Texas A&M Cyclotron Institute and based on the latest SRIM-2013 [7] models). The results are shown in Ion LETEFF, Depth, and Range in Silicon.

Table 5-1 Ion LETEFF, Depth, and Range in Silicon
Ion TypeBeam Energy (MeV / nucleon)Angle of IncidenceDegrader Steps (Number)Degrader AngleLETEFF (MeV × cm2/ mg)
109Ag1500048
109Ag

15

0

0

0

43

84Kr

15

0

0

0

30.6

63Cu

15

0

0

0

20.2