SLVSGX1B July   2023  – April 2025 TPS25984

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Parallel Device Synchronization (SWEN)
      8. 7.3.8  Stacking Multiple eFuses for Unlimited Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (FLT)
      12. 7.3.12 Power-Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
      15. 7.3.15 Single Point Failure Mitigation
        1. 7.3.15.1 IMON Pin Single Point Failure
        2. 7.3.15.2 ILIM Pin Single Point Failure
        3. 7.3.15.3 IREF Pin Single Point Failure
        4. 7.3.15.4 ITIMER Pin Single Point Failure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
      3. 8.1.3 Multiple eFuses, Parallel Connection With PMBus
      4. 8.1.4 Digital Telemetry Using External Microcontroller
    2. 8.2 Typical Application: 12-V, 3.3-kW Power Path Protection in Data Center Servers
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Transient Protection
      2. 8.4.2 Output short-Circuit Measurements
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.9 Typical Characteristics

TPS25984 ON Resistance Across TemperatureFigure 6-1 ON Resistance Across Temperature
TPS25984 VIN Undervoltage Thresholds Across TemperatureFigure 6-3 VIN Undervoltage Thresholds Across Temperature
TPS25984 EN/UVLO Thresholds For FET Turn-off Across TemperatureFigure 6-5 EN/UVLO Thresholds For FET Turn-off Across Temperature
TPS25984 IREF Charging Current Across TemperatureFigure 6-7 IREF Charging Current Across Temperature
TPS25984 ackup Overcurrent Protection Threshold (Start-up) AccuracyFigure 6-9 ackup Overcurrent Protection Threshold (Start-up) Accuracy
TPS25984 ITIMER Pin Internal Pullup Voltage Across TemperatureFigure 6-11 ITIMER Pin Internal Pullup Voltage Across Temperature
TPS25984 ITIMER Pin Discharge Differential Voltage Threshold Across TemperatureFigure 6-13 ITIMER Pin Discharge Differential Voltage Threshold Across Temperature
TPS25984 DVDT Charging Current Across TemperatureFigure 6-15 DVDT Charging Current Across Temperature
TPS25984 QOD Sink Current Across TemperatureFigure 6-17 QOD Sink Current Across Temperature
TPS25984 Input Hot-plug With Insertion Delay
Input hot-plugged into 12 V supply
Figure 6-19 Input Hot-plug With Insertion Delay
TPS25984 Power Up and Down Sequencing Using EN/UVLO Pin
Input supply held steady, EN/UVLO pin toggled low and high
Figure 6-21 Power Up and Down Sequencing Using EN/UVLO Pin
TPS25984 Power Down Control Using EN/UVLO Pin
Input supply held steady, EN/UVLO pin toggled from high (above VUVLO(R)) to low (below VSD(F))
Figure 6-23 Power Down Control Using EN/UVLO Pin
TPS25984 Power Down Control Using EN/UVLO Pin with Quick Output Discharge (QOD)
Input supply held steady, EN/UVLO pin toggled from high (above VUVLO(R)) to intermediate voltage (below VUVLO(F) and above VSD(F)) and held there
Figure 6-25 Power Down Control Using EN/UVLO Pin with Quick Output Discharge (QOD)
TPS25984 Inrush Current Control with Capacitive Load
COUT = 18 mF, CdVdt = 33 nF
Figure 6-27 Inrush Current Control with Capacitive Load
TPS25984 Input Overvoltage Protection Response
Input supply ramped up above 16.6 V.
Figure 6-29 Input Overvoltage Protection Response
TPS25984 Peak Current Support Using Transient Overcurrent Blanking
IOCP = 55 A, tITIMER = 16 ms, IOUT pulsed above the IOCP threshold for duration shorted than tITIMER without triggering circuit-breaker response.
Figure 6-31 Peak Current Support Using Transient Overcurrent Blanking
TPS25984 Short-Circuit Protection Response
IOCP = 55 A, Output hard-short to GND while in steady. IOUT rises above 2 × IOCP triggers fast-trip response
Figure 6-33 Short-Circuit Protection Response
TPS25984 VDD Undervoltage Thresholds Across TemperatureFigure 6-2 VDD Undervoltage Thresholds Across Temperature
TPS25984 VIN Overvoltage Protection Thresholds Across TemperatureFigure 6-4 VIN Overvoltage Protection Thresholds Across Temperature
TPS25984 EN/UVLO Based Thresholds for Device Shutdown Across TemperatureFigure 6-6 EN/UVLO Based Thresholds for Device Shutdown Across Temperature
TPS25984 IMON Gain Across Load and TemperatureFigure 6-8 IMON Gain Across Load and Temperature
TPS25984 Backup Overcurrent Protection Threshold (Steady-State) AccuracyFigure 6-10 Backup Overcurrent Protection Threshold (Steady-State) Accuracy
TPS25984 ITIMER Pin Discharge Current Across TemperatureFigure 6-12 ITIMER Pin Discharge Current Across Temperature
TPS25984 SWEN Pin Logic Thresholds Across TemperatureFigure 6-14 SWEN Pin Logic Thresholds Across Temperature
TPS25984 DVDT Gain Across TemperatureFigure 6-16 DVDT Gain Across Temperature
TPS25984 Junction Temperature vs Load Current (No Air-Flow)Figure 6-18 Junction Temperature vs Load Current (No Air-Flow)
TPS25984 Power Up Control Using Input Supply
EN/UVLO pin held high, Input supply ramped up to 12 V
Figure 6-20 Power Up Control Using Input Supply
TPS25984 Power Up Control Using EN/UVLO Pin
Input supply held steady, EN/UVLO pin toggled from low (below VSD(F)) to high (above VUVLO(R))
Figure 6-22 Power Up Control Using EN/UVLO Pin
TPS25984 Power Down Control Using EN/UVLO Pin without engaging Quick Output Discharge (QOD)
Input supply held steady, EN/UVLO pin toggled from high (above VUVLO(R)) to low (below VSD(F))
Figure 6-24 Power Down Control Using EN/UVLO Pin without engaging Quick Output Discharge (QOD)
TPS25984 Power Up and Down Sequencing Using SWEN Pin
Input supply held steady, EN/UVLO pin held high, SWEN pin toggled low and high
Figure 6-26 Power Up and Down Sequencing Using SWEN Pin
TPS25984 Inrush Current Control with Capacitive and Resistive Load
COUT = 15.5 mF, ROUT = 0.6 Ω, CdVdt = 33 nF
Figure 6-28 Inrush Current Control with Capacitive and Resistive Load
TPS25984 Input Overvoltage Protection Response Followed By Recovery
Input supply ramped up above 16.6 V and then ramped down to 12 V.
Figure 6-30 Input Overvoltage Protection Response Followed By Recovery
TPS25984 Overcurrent Protection Response (Circuit-Breaker)
IOCP = 55 A, tITIMER = 16 ms, IOUT stays above the IOCP threshold persistently to trigger circuit-breaker response.
Figure 6-32 Overcurrent Protection Response (Circuit-Breaker)
TPS25984 Power Up into Short-Circuit
Device turned on using EN/UVLO pin with output hard-short to GND. Device limits the current with foldback and then hits thermal shutdown.
Figure 6-34 Power Up into Short-Circuit