High power overcurrent events are characterized by duration, the input and output voltage occurs at, and the resulting current. In these high power overcurrent conditions, the dissipated power in the pass element becomes much greater than nominal operating conditions. Depending on the specific overcurrent conditions, the device heats up until reaching thermal shutdown. However, depending on the specific overcurrent event, the device may heat faster than the thermal shutdown circuitry can respond.

Table 8-1 specifies resistors values for a desired current limit setting and the anticipated accuracy of the programmable current limit at the specified setting.

The magnitude of the over-current condition intensifies as a function of the VIN - VOUT differential and pulse width (for faults to be evaluated as DC, a 1s pulse can be used). By combining the input and output voltage differential, fault pulse width, and programmable current limit setting, a recommended programmable current limit protection area is derived as shown in Figure 9-2 which is characterized using validation hardware for the TPS7H1121 (ceramic and plastic package) under laboratory ambient conditions (TA = 25ºC). The effective thermal resistance of the PCB thermal pad is calculated to be RTH(PCB) = 5ºC/W; this calculation takes into account the thermal via diameter, spacing, and board layers. Applied faults of pulse width of 10ms, 100ms and 1s are applied until the device is no longer functional; the applied voltage and programmed current are then adjusted lower on subsequent units until the curve is determined.

For the ceramic HFT package, 3A is a recommended maximum programmable current limit setting as the 20% accuracy has a maximum current limit of 3.6A, which is below the Absolute Maximum rating of 3.9A.

For the PWP24 (plastic) package, 3.15A is the recommended maximum programmable current limit setting. With an accuracy of 24%, the maximum current limit is 3.9A, which meets the Absolute Maximum Rating of 3.9A.

The depicted curve is very dependent on assumed ambient temperatures, package thermal resistance, PCB thermal resistances and nature of the applied short; the curve below is only applicable for the validation hardware utilized.