The current-limit circuit activates if the current flowing through the low-side MOSFET exceeds the I_LIMIT current. This feature restricts motor current to less than the I_LIMIT.

The current-limit circuitry utilizes the current sense amplifier output of the three phases compared with the voltage at ILIMIT pin. Figure 7-30 shows the implementation of current limit circuitry. As shown in Figure 7-30, the output of current sense amplifiers is combined with star connected resistive network. This measured voltage V_MEAS is compared with the external reference voltage V_ILIM pin to realize the current limit implementation. The relation between current sensed on OUTX pin and V_MEAS threshold is given as:

where

• V_VREFis the current sense amplifier supply
• I_OUTX is current flowing into the low-side MOSFET
• CSA_GAIN is the current sense amplifier gain

The I_LIMIT threshold can be adjusted by configuring the voltage at ILIMIT pin. ILIMIT varies linearly between 0A to 40A, as the voltage at ILIMIT pin varies from V_VREF/2 to ( V_VREF - 0.25V ) or GVDD. A voltage more than VREF can be applied to disable ILIMIT.

Current limit comparator output is blanked for a blanking time, on every rising edge of high side and low side switch control input (INHx and INLx) and the DRV8378 output state depends on the INHx and INLx status during blanking time. The blanking time is configured through ILIM_BLANK_SEL in SPI device and the blanking time is fixed to 5.5us for slew rate of 50V/ns and 1.8us for all other slew rates in hardware variant.

For the SPI variant of the DRV8378, current limit is achieved by programming the bits ILIMIT_SEL_CODE [13:11] in DRV_CTRL register. In this case the current limit is a function of both reference voltage applied on the VREF input as well as the current sense amplifier gain (G_CSA). The relation between current limit, reference voltage and G_CSA is given as $I_{LIMIT} = \frac{\left(3\right.\times \left.V_{VREF}\right)}{\left(40\right.\times \left.G_{CSA}\right)}\left[1 + {CODE}_{ILIMIT\_SEL\_CODE}\right]$ where

• V_VREF = Reference voltage
• G_CSA = Current Sense Amplifier Gain value
• CODE_{ILIMIT_SEL_CODE} = 3 bit code in decimal value (0 through 6, for CODE = 7, I_LIMIT is disabled )

For example with G_CSA = 0.32V/A, V_VREF = 3.3V, CODE = 5, I_LIMIT = 4.64A

When then the current limit activates, the high-side FET of each half bridge is disabled until the rising edge of the high side (INHx) of that half bridge as shown in Figure 7-31. The low-side FETs can operate in brake mode or Coast (high-Z) mode by configuring the ILIM_MODE bit in the SPI device variant. The low-side FETs operate in Coast (high-Z) mode in the hardware variant.