SLVSHP8 January   2026 TPS544B28

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  D-CAP4 Control
      2. 7.3.2  Internal VCC LDO and Using External Bias On the VCC Pin
        1. 7.3.2.1 Powering the Device From a Single Bus
        2. 7.3.2.2 Powering the Device From a Split-Rail Configuration
      3. 7.3.3  Multifunction Select (MS1) Pin
      4. 7.3.4  Multifunction Select (MS2) Pin
      5. 7.3.5  Address (ADR) Pin
      6. 7.3.6  Enable
      7. 7.3.7  Soft Start
      8. 7.3.8  Power Good
      9. 7.3.9  Overvoltage and Undervoltage Protection
      10. 7.3.10 Output Voltage Setting (External Feedback Configuration)
      11. 7.3.11 Remote Sense
      12. 7.3.12 Low-side MOSFET Zero-Crossing
      13. 7.3.13 Current Sense and Positive Overcurrent Protection
      14. 7.3.14 Low-side MOSFET Negative Current Limit
      15. 7.3.15 Output Voltage Discharge
      16. 7.3.16 UVLO Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip (PFM) Eco-mode Light Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
  9. 8 Programming Registers
    1. 8.1  OPERATION (Address = 1h) [Reset = 00h]
    2. 8.2  ON_OFF_CONFIG (Address = 2h) [Reset = XXh]
    3. 8.3  CLEAR_FAULTS (Address = 3h) [Reset = 00h]
    4. 8.4  WRITE_PROTECT (Address = 10h) [Reset = 00h]
    5. 8.5  STORE_USER_ALL (Address = 15h) [Reset = 00h]
    6. 8.6  RESTORE_USER_ALL (Address = 16h) [Reset = 00h]
    7. 8.7  CAPABILITY (Address = 19h) [Reset = C0h]
    8. 8.8  VOUT_MODE (Address = 20h) [Reset = 96h]
    9. 8.9  VOUT_COMMAND (Address = 21h) [Reset = 0000h]
    10. 8.10 VOUT_MARGIN_HIGH (Address = 25h) [Reset = 0000h]
    11. 8.11 VOUT_MARGIN_LOW (Address = 26h) [Reset = 0000h]
    12. 8.12 VOUT_TRANSITION_RATE (Address = 27h) [Reset = E81Ah]
    13. 8.13 VOUT_SCALE_LOOP (Address = 29h) [Reset = E804h]
    14. 8.14 FREQUENCY_SWITCH (Address = 33h) [Reset = 380Xh]
    15. 8.15 VOUT_OV_FAULT_RESPONSE (Address = 41h) [Reset = XXh]
    16. 8.16 VOUT_UV_FAULT_RESPONSE (Address = 45h) [Reset = XXh]
    17. 8.17 IOUT_OC_FAULT_LIMIT (Address = 46h) [Reset = 00XXh]
    18. 8.18 TON_DELAY (Address = 60h) [Reset = 000Xh]
    19. 8.19 TON_RISE (Address = 61h) [Reset = F80Xh]
    20. 8.20 TOFF_DELAY (Address = 64h) [Reset = 000Xh]
    21. 8.21 TOFF_FALL (Address = 65h) [Reset = F80Xh]
    22. 8.22 STATUS_BYTE (Address = 78h) [Reset = 81h]
    23. 8.23 STATUS_WORD (Address = 79h) [Reset = 2800h]
    24. 8.24 STATUS_CML (Address = 7Eh) [Reset = 00h]
    25. 8.25 STATUS_MFR_SPECIFIC (Address = 80h) [Reset = 00h]
    26. 8.26 READ_VOUT (Address = 8Bh) [Reset = 0000h]
    27. 8.27 READ_IOUT (Address = 8Ch) [Reset = DXXXh]
    28. 8.28 READ_TEMP1 (Address = 8Dh) [Reset = 0XXXh]
    29. 8.29 PMBUS_REVISION (Address = 98h) [Reset = 55h]
    30. 8.30 MFR_ID (Address = 99h) [Reset = 4954h]
    31. 8.31 MFR_MODEL (Address = 9Ah) [Reset = 00284B54h]
    32. 8.32 MFR_REVISION (Address = 9Bh) [Reset = X0h]
    33. 8.33 IC_DEVICE_ID (Address = ADh) [Reset = 00284B544954h]
    34. 8.34 IC_DEVICE_REV (Address = AEh) [Reset = 00h]
    35. 8.35 SYS_CFG_USER1 (Address = D1h) [Reset = XXh]
    36. 8.36 PASSKEY (Address = D2h) [Reset = X0h]
    37. 8.37 COMP (Address = D4h) [Reset = XXh]
    38. 8.38 VBOOT (Address = D5h) [Reset = XXh]
    39. 8.39 NVM_CHECKSUM (Address = D9h) [Reset = 0000h]
    40. 8.40 FUSION_ID0 (Address = FCh) [Reset = 02C0h]
    41. 8.41 FUSION_ID1 (Address = FDh) [Reset = 4h]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting Point
        2. 9.2.2.2 Choose the Switching Frequency
        3. 9.2.2.3 Choose the Inductor
        4. 9.2.2.4 Choose the Output Capacitor
        5. 9.2.2.5 Choose the Input Capacitors (CIN)
        6. 9.2.2.6 VCC Bypass Capacitor
        7. 9.2.2.7 BOOT Capacitor
        8. 9.2.2.8 PG Pullup Resistor
        9. 9.2.2.9 Choose the PMBus® Address and Fault Recovery Mode
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

9.1 Application Information

The TPS544B28 device is a high-efficiency, single-channel, small-sized, synchronous buck converter. The device is designed for low output voltage point-of-load applications with 20A or lower output current in server, storage, and similar computing applications. The TPS544B28 features proprietary D-CAP4 mode control combined with adaptive on-time architecture. This combination builds modern low-duty-ratio and ultra-fast load-step-response DC/DC converters in an excellent fashion. The output voltage ranges from to 5.5V. The conversion input voltage ranges from 2.7V to 16V, and the VCC input voltage ranges from 3.1V to 5.3V. The D-CAP4 mode uses emulated current information to control the modulation. An advantage of this control scheme is that this control scheme does not require an external phase-compensation network, which makes the device easy-to-use and also allows for a low external component count. Another advantage of this control scheme is that the control scheme supports stable operation with all low ESR output capacitors (such as ceramic capacitor and low ESR polymer capacitor). Adaptive on-time control tracks the preset switching frequency over a wide range of input and output voltages while increasing switching frequency as needed during a load-step transient.