Small-value capacitors must be ceramic, and placed closely to device pins.

The DRV81315/A DDA package uses an HSOIC package with an exposed PowerPAD™. The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can be accomplished by adding several vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers.

For details about how to design the PCB, see the TI Application note, PowerPAD Thermally Enhanced Package (SLMA002), and TI Application Brief, PowerPAD Made Easy (SLMA004), available at www.ti.com.

The DRV81315ADRL package benefits from a very good junction to top, junction to Board thermal resistance parameter. To achieve good thermal performance, connecting the OUT and SOURCE pins to large copper pour is beneficial. On the top PCB layer, the pour can extend beyond the package dimensions. In addition to this, having a OUT plane on one or more internal PCB layers and/or on the bottom layer is recommended. Vias must connect these planes to the top OUT pour. The SOURCE pin can electrically be connected to the board GND and vias to the GND layer can help improve the performance