SLVSII7 December   2025 TPSM8D7420 , TPSM8D7620

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN)
      2. 7.3.2  Bias Supply Regulator (VCC)
      3. 7.3.3  Device Configuration Pin (MSEL)
      4. 7.3.4  Multiphase Output Configuration
      5. 7.3.5  Enable and Adjustable UVLO
      6. 7.3.6  Adjustable Switching Frequency
      7. 7.3.7  Device Synchronization (SYNC)
        1. 7.3.7.1 Clock Locking
      8. 7.3.8  Adjustable Output Voltage (FB)
      9. 7.3.9  Control Loop Compensation (COMP)
      10. 7.3.10 Slope Compensation
      11. 7.3.11 Power-Good Output Voltage Monitoring
      12. 7.3.12 Output Discharge
      13. 7.3.13 Soft-Start (SS)
      14. 7.3.14 Overcurrent Protection (OCP)
      15. 7.3.15 Temperature Output
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Peak Current Mode Operation
        2. 7.4.3.2 Diode Emulation
        3. 7.4.3.3 FPWM Mode Operation
        4. 7.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
        6. 7.4.3.6 Recovery from Dropout
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 Setting the Output Voltage
        4. 8.2.2.4 Integrated Inductor Considerations
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 VCC and BOOT Capacitors
        7. 8.2.2.7 Output Capacitor Selection
        8. 8.2.2.8 Compensation Selection
      3. 8.2.3 Application Curves
    3. 8.3 2-PH Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves 2-PH
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Design and Layout
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.1 Shutdown Mode

The EN pin provides ON and OFF control for the TPSM8D7x20. When VEN is below approximately 0.25V, the device is in shutdown mode. Both the internal LDO and the switching regulator are off. The quiescent current in shutdown mode drops to 2 µA (typical). The TPSM8D7x20 also employs internal undervoltage protection. If the input voltage is below the UV threshold, the regulator remains off.