SLVSII7 December 2025 TPSM8D7420 , TPSM8D7620
PRODUCTION DATA
The TPSM8D7x20 continues to regulate output voltage if the input-to-output voltage ratio requires an on-time less than the minimum on-time of the chip with a given clock setting. This is accomplished using valley current control. At all times, the compensation circuit dictates both a maximum peak inductor current and a maximum valley inductor current. If, for any reason, valley current is exceeded, the clock cycle is extended until valley current falls below that determined by the compensation circuit. If the device is not operating within the current limit, the maximum valley current is set above the peak inductor current. This prevents valley control from being used unless there is a failure to regulate using peak current only. If the input-voltage to output-voltage ratio is too high, even though current exceeds the peak value dictated by compensation, the high-side device cannot be turned off quickly enough to regulate output voltage. See tON_MIN in the Electrical Characteristics. As a result, the compensation circuit reduces both peak and valley current. After a low enough current is selected by the compensation circuit, valley current matches that being commanded by the compensation circuit. Under these conditions, the low-side device is kept on and the next clock cycle is prevented from starting until inductor current drops below the desired valley current. Because on-time is fixed at the minimum value, this type of operation resembles that of a device using a COT control scheme. See Valley Current Mode Operation.
