SLVSIO1B March   2026  – April 2026 UCG28836 , UCG28846

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Descriptions
      1. 7.3.1  HV - High Voltage Input
      2. 7.3.2  SW - Switch Node
      3. 7.3.3  GND – Ground Return
      4. 7.3.4  FLT - External Overtemperature Fault
      5. 7.3.5  FB ­­– Feedback
      6. 7.3.6  TR - Turns Ratio
      7. 7.3.7  IPS - Peak Current, and Slew Rate
      8. 7.3.8  FCL - Frequency Clamp and Fault Response
      9. 7.3.9  CFX - CCM, Frequency Foldback and X-cap Discharge
      10. 7.3.10 VCC - Input Bias
    4. 7.4 Feature Description
      1. 7.4.1  Self Bias and Auxless Sensing
      2. 7.4.2  Control Law
        1. 7.4.2.1 Valley Switching
        2. 7.4.2.2 Frequency Foldback
        3. 7.4.2.3 Burst Mode
        4. 7.4.2.4 Continuous Conduction Mode (CCM)
      3. 7.4.3  GaN HEMT Switching Capability
      4. 7.4.4  Soft Start
      5. 7.4.5  Frequency Clamp
      6. 7.4.6  Frequency Dithering
      7. 7.4.7  Slew Rate Control
      8. 7.4.8  Transient Peak Power Capability
      9. 7.4.9  X-Cap Discharge
      10. 7.4.10 Fault Protections
        1. 7.4.10.1 Brownout Protection
        2. 7.4.10.2 Short-Circuit Protection
        3. 7.4.10.3 Output Overvoltage Protection
        4. 7.4.10.4 Overpower Protection (OPP, LPS)
        5. 7.4.10.5 Overtemperature Protection
        6. 7.4.10.6 Open FB Protection
        7. 7.4.10.7 Error Codes for Protections
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Bulk Capacitor
        2. 8.2.2.2 Transformer Primary Inductance and Turns Ratio
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Selection Resistors
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.2.1 Valley Switching

The UCG2883x/4x is designed to operate with soft switching and primary FET turn-on at a valley to reduce switching losses. The converter operates in valley switching except during peak load transients during which control can transition to CCM mode (if enabled using CFX pin). During valley switching mode, the target valley and peak current threshold are governed by the control law of Figure 7-4 and Equation 1:

Equation 1. I P K = 1.45 × V F B - 0.25

During valley switching, with increasing output power, the peak current threshold continues to increase linearly as per above equation. The switching frequency also varies based on IPK and valley targets corresponding to the instantaneous FB pin voltage. When output power is increasing from light loads to rated power, the control transitions from the 6th valley till the 1st valley with corresponding linear increase in IPK threshold. As output power continues to increase further to take FB voltage to the edge of the 1st valley operation, the converter transitions into CCM mode operation with IPK clamped to the maximum value IPK,MAX and increase in switching frequency FSW with further increase in output load. This clamp on IPK,MAX limits the transformer size in a high density power supply design. See Section 7.4.2.4 for details of CCM mode of operation. If output power reduces while operating in the 6th valley, the control transitions to frequency foldback mode to operate at higher valleys and lower frequency to reduce switching losses further.

The FB pin voltage thresholds for valley transitions include a hysteresis and vary depending on increasing or decreasing POUT to enable valley locking and prevent any audible noise due to hopping between valleys. Refer to the Electrical Characteristics table for FB pin voltage thresholds which determine the mode of operation for UCG2883x/4x. For zero optocoupler collector current with large POUT, the FB pin is pulled up to VFBOPEN through a 60kΩ resistor.

UCG28836 UCG28846 Valley Counter With Continuous Valley Occurrence Figure 7-5 Valley Counter With Continuous Valley Occurrence

Typically, the control counts the valleys and turns on the primary GaN HEMT once the target valley is reached, shown in Figure 7-5. For the case when SW node waveform is damped so the valleys disappear before reaching the target valley, a DCM ring fixed timer of 3.75μs starts to continue counting valleys and turn on the primary GaN HEMT once the valley target is reached, shown in Figure 7-6. During start-up (soft start) when VOUT is small, if the valleys do not appear, the controller turns on the primary GaN HEMT after 100μs from last turn on, to switch at 10kHz (the minimum frequency clamp during soft start) for initial few cycles to avoid latch up condition.

UCG28836 UCG28846 Valley Counter With Missing Valleys Figure 7-6 Valley Counter With Missing Valleys

The UCG2883x/4x supports infinite CCM operation duration. Because of higher loss in the CCM operation, thermal design of the converter needs to be considered to avoid overheating of the system. At all times during operation of UCG2883x/4x, the maximum switching frequency can be limited with a frequency clamp setting programmable with a resistor from FCL pin to GND, as detailed in Section 7.3.8.